STM32F0 Standard Peripheral bibliotheek  1.0
ST Microelectronics standard peripheral bibliotheek documentatie voor de STM32F0 familie
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stm32f0xx_rcc.c File Reference

This file provides firmware functions to manage the following functionalities of the Reset and clock control (RCC) peripheral: More...

#include "stm32f0xx_rcc.h"

Macros

#define FLAG_MASK   ((uint8_t)0x1F)
 
#define CR_BYTE2_ADDRESS   ((uint32_t)0x40021002)
 
#define CFGR_BYTE3_ADDRESS   ((uint32_t)0x40021007)
 
#define CIR_BYTE1_ADDRESS   ((uint32_t)0x40021009)
 
#define CIR_BYTE2_ADDRESS   ((uint32_t)0x4002100A)
 

Functions

void RCC_DeInit (void)
 Resets the RCC clock configuration to the default reset state. More...
 
void RCC_HSEConfig (uint8_t RCC_HSE)
 Configures the External High Speed oscillator (HSE). More...
 
ErrorStatus RCC_WaitForHSEStartUp (void)
 Waits for HSE start-up. More...
 
void RCC_AdjustHSICalibrationValue (uint8_t HSICalibrationValue)
 Adjusts the Internal High Speed oscillator (HSI) calibration value. More...
 
void RCC_HSICmd (FunctionalState NewState)
 Enables or disables the Internal High Speed oscillator (HSI). More...
 
void RCC_AdjustHSI14CalibrationValue (uint8_t HSI14CalibrationValue)
 Adjusts the Internal High Speed oscillator for ADC (HSI14) calibration value. More...
 
void RCC_HSI14Cmd (FunctionalState NewState)
 Enables or disables the Internal High Speed oscillator for ADC (HSI14). More...
 
void RCC_HSI14ADCRequestCmd (FunctionalState NewState)
 Enables or disables the Internal High Speed oscillator request from ADC. More...
 
void RCC_LSEConfig (uint32_t RCC_LSE)
 Configures the External Low Speed oscillator (LSE). More...
 
void RCC_LSEDriveConfig (uint32_t RCC_LSEDrive)
 Configures the External Low Speed oscillator (LSE) drive capability. More...
 
void RCC_LSICmd (FunctionalState NewState)
 Enables or disables the Internal Low Speed oscillator (LSI). More...
 
void RCC_PLLConfig (uint32_t RCC_PLLSource, uint32_t RCC_PLLMul)
 Configures the PLL clock source and multiplication factor. More...
 
void RCC_PLLCmd (FunctionalState NewState)
 Enables or disables the PLL. More...
 
void RCC_PREDIV1Config (uint32_t RCC_PREDIV1_Div)
 Configures the PREDIV1 division factor. More...
 
void RCC_ClockSecuritySystemCmd (FunctionalState NewState)
 Enables or disables the Clock Security System. More...
 
void RCC_MCOConfig (uint8_t RCC_MCOSource)
 Selects the clock source to output on MCO pin (PA8). More...
 
void RCC_SYSCLKConfig (uint32_t RCC_SYSCLKSource)
 Configures the system clock (SYSCLK). More...
 
uint8_t RCC_GetSYSCLKSource (void)
 Returns the clock source used as system clock. More...
 
void RCC_HCLKConfig (uint32_t RCC_SYSCLK)
 Configures the AHB clock (HCLK). More...
 
void RCC_PCLKConfig (uint32_t RCC_HCLK)
 Configures the APB clock (PCLK). More...
 
void RCC_ADCCLKConfig (uint32_t RCC_ADCCLK)
 Configures the ADC clock (ADCCLK). More...
 
void RCC_CECCLKConfig (uint32_t RCC_CECCLK)
 Configures the CEC clock (CECCLK). More...
 
void RCC_I2CCLKConfig (uint32_t RCC_I2CCLK)
 Configures the I2C1 clock (I2C1CLK). More...
 
void RCC_USARTCLKConfig (uint32_t RCC_USARTCLK)
 Configures the USART1 clock (USART1CLK). More...
 
void RCC_GetClocksFreq (RCC_ClocksTypeDef *RCC_Clocks)
 Returns the frequencies of the System, AHB and APB busses clocks. More...
 
void RCC_RTCCLKConfig (uint32_t RCC_RTCCLKSource)
 Configures the RTC clock (RTCCLK). More...
 
void RCC_RTCCLKCmd (FunctionalState NewState)
 Enables or disables the RTC clock. More...
 
void RCC_BackupResetCmd (FunctionalState NewState)
 Forces or releases the Backup domain reset. More...
 
void RCC_AHBPeriphClockCmd (uint32_t RCC_AHBPeriph, FunctionalState NewState)
 Enables or disables the AHB peripheral clock. More...
 
void RCC_APB2PeriphClockCmd (uint32_t RCC_APB2Periph, FunctionalState NewState)
 Enables or disables the High Speed APB (APB2) peripheral clock. More...
 
void RCC_APB1PeriphClockCmd (uint32_t RCC_APB1Periph, FunctionalState NewState)
 Enables or disables the Low Speed APB (APB1) peripheral clock. More...
 
void RCC_AHBPeriphResetCmd (uint32_t RCC_AHBPeriph, FunctionalState NewState)
 Forces or releases AHB peripheral reset. More...
 
void RCC_APB2PeriphResetCmd (uint32_t RCC_APB2Periph, FunctionalState NewState)
 Forces or releases High Speed APB (APB2) peripheral reset. More...
 
void RCC_APB1PeriphResetCmd (uint32_t RCC_APB1Periph, FunctionalState NewState)
 Forces or releases Low Speed APB (APB1) peripheral reset. More...
 
void RCC_ITConfig (uint8_t RCC_IT, FunctionalState NewState)
 Enables or disables the specified RCC interrupts. More...
 
FlagStatus RCC_GetFlagStatus (uint8_t RCC_FLAG)
 Checks whether the specified RCC flag is set or not. More...
 
void RCC_ClearFlag (void)
 Clears the RCC reset flags. The reset flags are: RCC_FLAG_OBLRST, RCC_FLAG_PINRST, RCC_FLAG_V18PWRRSTF, RCC_FLAG_PORRST, RCC_FLAG_SFTRST, RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST, RCC_FLAG_LPWRRST. More...
 
ITStatus RCC_GetITStatus (uint8_t RCC_IT)
 Checks whether the specified RCC interrupt has occurred or not. More...
 
void RCC_ClearITPendingBit (uint8_t RCC_IT)
 Clears the RCC's interrupt pending bits. More...
 

Detailed Description

This file provides firmware functions to manage the following functionalities of the Reset and clock control (RCC) peripheral:

Author
MCD Application Team
Version
V1.0.1
Date
20-April-2012
  • Internal/external clocks, PLL, CSS and MCO configuration
  • System, AHB and APB busses clocks configuration
  • Peripheral clocks configuration
  • Interrupts and flags management
===============================================================================
                       ##### RCC specific features #####
===============================================================================
   [..] After reset the device is running from HSI (8 MHz) with Flash 0 WS, 
        all peripherals are off except internal SRAM, Flash and SWD.
        (#) There is no prescaler on High speed (AHB) and Low speed (APB) busses;
            all peripherals mapped on these busses are running at HSI speed.
        (#) The clock for all peripherals is switched off, except the SRAM and FLASH.
        (#) All GPIOs are in input floating state, except the SWD pins which
            are assigned to be used for debug purpose.
   [..] Once the device started from reset, the user application has to:
        (#) Configure the clock source to be used to drive the System clock
            (if the application needs higher frequency/performance)
        (#) Configure the System clock frequency and Flash settings
        (#) Configure the AHB and APB busses prescalers
        (#) Enable the clock for the peripheral(s) to be used
        (#) Configure the clock source(s) for peripherals which clocks are not
            derived from the System clock (ADC, CEC, I2C, USART, RTC and IWDG)
Attention

© COPYRIGHT 2012 STMicroelectronics

Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this file except in compliance with the License. You may obtain a copy of the License at:

   http://www.st.com/software_license_agreement_liberty_v2

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.