This file contains all the functions prototypes for the CPAL_I2C_HAL firmware layer. More...

#include "stm32f0xx.h"
#include "stm32f0xx_i2c.h"
#include "stm32f0xx_dma.h"
#include "stm32f0xx_gpio.h"
#include "stm32f0xx_rcc.h"
#include "stm32f0xx_misc.h"
#include "stm32f0xx_i2c_cpal.h"

Macros
#define	CPAL_I2C1_SCL_GPIO_PORT GPIOB

#define	CPAL_I2C1_SCL_GPIO_CLK RCC_AHBPeriph_GPIOB

#define	CPAL_I2C1_SCL_GPIO_PIN GPIO_Pin_6

#define	CPAL_I2C1_SCL_GPIO_PINSOURCE GPIO_PinSource6

#define	CPAL_I2C1_SDA_GPIO_PORT GPIOB

#define	CPAL_I2C1_SDA_GPIO_CLK RCC_AHBPeriph_GPIOB

#define	CPAL_I2C1_SDA_GPIO_PIN GPIO_Pin_7

#define	CPAL_I2C1_SDA_GPIO_PINSOURCE GPIO_PinSource7

#define	CPAL_I2C2_SCL_GPIO_PORT GPIOB

#define	CPAL_I2C2_SCL_GPIO_CLK RCC_AHBPeriph_GPIOB

#define	CPAL_I2C2_SCL_GPIO_PIN GPIO_Pin_10

#define	CPAL_I2C2_SCL_GPIO_PINSOURCE GPIO_PinSource10

#define	CPAL_I2C2_SDA_GPIO_PORT GPIOB

#define	CPAL_I2C2_SDA_GPIO_CLK RCC_AHBPeriph_GPIOB

#define	CPAL_I2C2_SDA_GPIO_PIN GPIO_Pin_11

#define	CPAL_I2C2_SDA_GPIO_PINSOURCE GPIO_PinSource11

#define	CPAL_I2C1_DMA_TX_Channel DMA1_Channel2

#define	CPAL_I2C1_DMA_RX_Channel DMA1_Channel3

#define	CPAL_I2C2_DMA_TX_Channel DMA1_Channel4

#define	CPAL_I2C2_DMA_RX_Channel DMA1_Channel5

#define	I2C1_IT_PRIO I2C1_IT_OFFSET_PREPRIO + 2 /* I2C1 IT PRIORITY */

#define	I2C1_IT_DMA_PRIO I2C1_IT_OFFSET_PREPRIO + 0 /* I2C1 DMA PRIORITY */

#define	I2C2_IT_PRIO I2C2_IT_OFFSET_PREPRIO + 2 /* I2C2 IT PRIORITY */

#define	I2C2_IT_DMA_PRIO I2C2_IT_OFFSET_PREPRIO + 0 /* I2C2 DMA PRIORITY */

#define	CPAL_I2C_DEV_NUM 2

#define	CPAL_DMA_CCR_EN DMA_CCR_EN

#define	CPAL_OPT_DMA_IT_MASK ((uint32_t)0x00003F00)

#define	CPAL_I2C_STATUS_ERR_MASK ((uint32_t)0x00000700)

#define	CPAL_I2C_STATUS_EVT_MASK ((uint16_t)0x0000000FE)

#define	CPAL_OPT_I2C_DMA_TX_IT_MASK ((uint32_t)0x00000700)

#define	CPAL_OPT_I2C_DMA_RX_IT_MASK ((uint32_t)0x00003800)

#define	CPAL_I2C_EVT_ADDR I2C_ISR_ADDR

#define	CPAL_I2C_EVT_STOP I2C_ISR_STOPF

#define	CPAL_I2C_EVT_NACK I2C_ISR_NACKF

#define	CPAL_I2C_EVT_RXNE I2C_ISR_RXNE

#define	CPAL_I2C_EVT_TXIS I2C_ISR_TXIS

#define	CPAL_I2C_EVT_TCR I2C_ISR_TCR

#define	CPAL_I2C_EVT_TC I2C_ISR_TC

#define	CPAL_I2C1_CLK RCC_APB1Periph_I2C1

#define	CPAL_I2C1_TXDR ((uint32_t)0x40005428)

#define	CPAL_I2C1_RXDR ((uint32_t)0x40005424)

#define	CPAL_I2C1_AF GPIO_AF_1

#define	CPAL_I2C1_DMA DMA1

#define	CPAL_I2C1_DMA_CLK RCC_AHBPeriph_DMA1

#define	CPAL_I2C1_IT_IRQn I2C1_IRQn

#define	CPAL_I2C1_DMA_IRQn DMA1_Channel2_3_IRQn

#define	CPAL_I2C1_DMA_IRQHandler DMA1_Channel2_3_IRQHandler

#define	CPAL_I2C1_DMA_TX_TC_FLAG DMA1_FLAG_TC2

#define	CPAL_I2C1_DMA_TX_HT_FLAG DMA1_FLAG_HT2

#define	CPAL_I2C1_DMA_TX_TE_FLAG DMA1_FLAG_TE2

#define	CPAL_I2C1_DMA_RX_TC_FLAG DMA1_FLAG_TC3

#define	CPAL_I2C1_DMA_RX_HT_FLAG DMA1_FLAG_HT3

#define	CPAL_I2C1_DMA_RX_TE_FLAG DMA1_FLAG_TE3

#define	CPAL_I2C2_CLK RCC_APB1Periph_I2C2

#define	CPAL_I2C2_TXDR ((uint32_t)0x40005828)

#define	CPAL_I2C2_RXDR ((uint32_t)0x40005824)

#define	CPAL_I2C2_AF GPIO_AF_1

#define	CPAL_I2C2_DMA DMA1

#define	CPAL_I2C2_DMA_CLK RCC_AHBPeriph_DMA1

#define	CPAL_I2C2_IT_IRQn I2C2_IRQn

#define	CPAL_I2C2_DMA_IRQn DMA1_Channel4_5_IRQn

#define	CPAL_I2C2_DMA_IRQHandler DMA1_Channel4_5_IRQHandler

#define	CPAL_I2C2_DMA_TX_TC_FLAG DMA1_FLAG_TC4

#define	CPAL_I2C2_DMA_TX_HT_FLAG DMA1_FLAG_HT4

#define	CPAL_I2C2_DMA_TX_TE_FLAG DMA1_FLAG_TE4

#define	CPAL_I2C2_DMA_RX_TC_FLAG DMA1_FLAG_TC5

#define	CPAL_I2C2_DMA_RX_HT_FLAG DMA1_FLAG_HT5

#define	CPAL_I2C2_DMA_RX_TE_FLAG DMA1_FLAG_TE5

#define	__I2C_CLK_CMD(clk, cmd) RCC_APB1PeriphClockCmd((clk),(cmd))

#define	__I2C_RCC_RESET(clk)

#define	__I2C_GPIO_CLK_CMD(clk, cmd) RCC_AHBPeriphClockCmd((clk),(cmd))

#define	__DMA_CLK_CMD(clk, cmd) RCC_AHBPeriphClockCmd((clk),(cmd))

#define	__DMA_RESET_CMD(clk, cmd) RCC_AHBPeriphResetCmd((clk),(cmd))

#define	__CPAL_I2C_HAL_ENABLE_DMATX(device) CPAL_I2C_DMA_TX_Channel[(device)]->CCR \|= CPAL_DMA_CCR_EN

#define	__CPAL_I2C_HAL_DISABLE_DMATX(device) CPAL_I2C_DMA_TX_Channel[(device)]->CCR &= ~CPAL_DMA_CCR_EN

#define	__CPAL_I2C_HAL_ENABLE_DMARX(device) CPAL_I2C_DMA_RX_Channel[(device)]->CCR \|= CPAL_DMA_CCR_EN

#define	__CPAL_I2C_HAL_DISABLE_DMARX(device) CPAL_I2C_DMA_RX_Channel[(device)]->CCR &= ~CPAL_DMA_CCR_EN

#define	__I2C_HAL_ENABLE_DMATX_TCIT(device) CPAL_I2C_DMA_TX_Channel[(device)]->CCR \|= DMA_IT_TC

#define	__I2C_HAL_ENABLE_DMATX_HTIT(device) CPAL_I2C_DMA_TX_Channel[(device)]->CCR \|= DMA_IT_HT

#define	__I2C_HAL_ENABLE_DMATX_TEIT(device) CPAL_I2C_DMA_TX_Channel[(device)]->CCR \|= DMA_IT_TE

#define	__I2C_HAL_ENABLE_DMARX_TCIT(device) CPAL_I2C_DMA_RX_Channel[(device)]->CCR \|= DMA_IT_TC

#define	__I2C_HAL_ENABLE_DMARX_HTIT(device) CPAL_I2C_DMA_RX_Channel[(device)]->CCR \|= DMA_IT_HT

#define	__I2C_HAL_ENABLE_DMARX_TEIT(device) CPAL_I2C_DMA_RX_Channel[(device)]->CCR \|= DMA_IT_TE

#define	__CPAL_I2C_HAL_GET_DMATX_IT(device)

#define	__CPAL_I2C_HAL_GET_DMATX_TCIT(device) (uint32_t)(CPAL_I2C_DMA[(device)]->ISR & CPAL_I2C_DMA_TX_TC_FLAG [(device)])

#define	__CPAL_I2C_HAL_GET_DMATX_HTIT(device) (uint32_t)(CPAL_I2C_DMA[(device)]->ISR & CPAL_I2C_DMA_TX_HT_FLAG [(device)])

#define	__CPAL_I2C_HAL_GET_DMATX_TEIT(device) (uint32_t)(CPAL_I2C_DMA[(device)]->ISR & CPAL_I2C_DMA_TX_TE_FLAG [(device)])

#define	__CPAL_I2C_HAL_GET_DMARX_IT(device)

#define	__CPAL_I2C_HAL_GET_DMARX_TCIT(device) (uint32_t)(CPAL_I2C_DMA[(device)]->ISR & CPAL_I2C_DMA_RX_TC_FLAG [(device)])

#define	__CPAL_I2C_HAL_GET_DMARX_HTIT(device) (uint32_t)(CPAL_I2C_DMA[(device)]->ISR & CPAL_I2C_DMA_RX_HT_FLAG [(device)])

#define	__CPAL_I2C_HAL_GET_DMARX_TEIT(device) (uint32_t)(CPAL_I2C_DMA[(device)]->ISR & CPAL_I2C_DMA_RX_TE_FLAG [(device)])

#define	__CPAL_I2C_HAL_CLEAR_DMATX_IT(device)

#define	__CPAL_I2C_HAL_CLEAR_DMARX_IT(device)

#define	__CPAL_I2C_HAL_DMATX_GET_CNDT(device) (uint32_t)(CPAL_I2C_DMA_TX_Channel[(device)]->CNDTR)

#define	__CPAL_I2C_HAL_DMARX_GET_CNDT(device) (uint32_t)(CPAL_I2C_DMA_RX_Channel[(device)]->CNDTR)

#define	__CPAL_I2C_HAL_ENABLE_DEV(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= I2C_CR1_PE

#define	__CPAL_I2C_HAL_DISABLE_DEV(device) CPAL_I2C_DEVICE[(device)]->CR1 &= ~I2C_CR1_PE

#define	__CPAL_I2C_HAL_SWRST(device)

#define	__CPAL_I2C_HAL_ENABLE_WAKEUP(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= I2C_CR1_WUPEN

#define	__CPAL_I2C_HAL_DISABLE_WAKEUP(device) CPAL_I2C_DEVICE[(device)]->CR1 &= ~I2C_CR1_WUPEN

#define	__CPAL_I2C_HAL_DISABLE_ALLIT(device)

#define	__CPAL_I2C_HAL_ENABLE_ERRIT(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= (I2C_CR1_ERRIE \| I2C_CR1_NACKIE)

#define	__CPAL_I2C_HAL_DISABLE_ERRIT(device) CPAL_I2C_DEVICE[(device)]->CR1 &= ~(I2C_CR1_ERRIE \| I2C_CR1_NACKIE)

#define	__CPAL_I2C_HAL_ENABLE_MASTER_IT(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= (I2C_CR1_TCIE \| I2C_CR1_STOPIE)

#define	__CPAL_I2C_HAL_DISABLE_MASTER_IT(device) CPAL_I2C_DEVICE[(device)]->CR1 &= ~(I2C_CR1_TCIE \| I2C_CR1_STOPIE)

#define	__CPAL_I2C_HAL_ENABLE_MASTER_TXIT(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= (I2C_CR1_TCIE \| I2C_CR1_STOPIE \| I2C_CR1_TXIE)

#define	__CPAL_I2C_HAL_ENABLE_MASTER_RXIT(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= (I2C_CR1_TCIE \| I2C_CR1_STOPIE \| I2C_CR1_RXIE)

#define	__CPAL_I2C_HAL_ENABLE_SLAVE_IT(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= (I2C_CR1_ADDRIE \| I2C_CR1_STOPIE)

#define	__CPAL_I2C_HAL_DISABLE_SLAVE_IT(device) CPAL_I2C_DEVICE[(device)]->CR1 &= ~(I2C_CR1_ADDRIE \| I2C_CR1_STOPIE)

#define	__CPAL_I2C_HAL_ENABLE_SLAVE_TXIT(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= (I2C_CR1_ADDRIE \| I2C_CR1_STOPIE \| I2C_CR1_TXIE)

#define	__CPAL_I2C_HAL_ENABLE_SLAVE_RXIT(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= (I2C_CR1_ADDRIE \| I2C_CR1_STOPIE \| I2C_CR1_RXIE)

#define	__CPAL_I2C_HAL_ENABLE_STOPIE_IT(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= I2C_CR1_STOPIE

#define	__CPAL_I2C_HAL_DISABLE_STOPIE_IT(device) CPAL_I2C_DEVICE[(device)]->CR1 &= ~I2C_CR1_STOPIE

#define	__CPAL_I2C_HAL_ENABLE_ADDRIE_IT(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= I2C_CR1_ADDRIE

#define	__CPAL_I2C_HAL_DISABLE_ADDRIE_IT(device) CPAL_I2C_DEVICE[(device)]->CR1 &= ~I2C_CR1_ADDRIE

#define	__CPAL_I2C_HAL_ENABLE_TCIE_IT(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= I2C_CR1_TCIE

#define	__CPAL_I2C_HAL_DISABLE_TCIE_IT(device) CPAL_I2C_DEVICE[(device)]->CR1 &= ~I2C_CR1_TCIE

#define	__CPAL_I2C_HAL_ENABLE_TXIE_IT(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= I2C_CR1_TXIE

#define	__CPAL_I2C_HAL_DISABLE_TXIE_IT(device) CPAL_I2C_DEVICE[(device)]->CR1 &= ~I2C_CR1_TXIE

#define	__CPAL_I2C_HAL_ENABLE_RXIE_IT(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= I2C_CR1_RXIE

#define	__CPAL_I2C_HAL_DISABLE_RXIE_IT(device) CPAL_I2C_DEVICE[(device)]->CR1 &= ~I2C_CR1_RXIE

#define	__CPAL_I2C_HAL_SADD_CONF(device, value)

#define	__CPAL_I2C_HAL_OA2_CONF(device, value)

#define	__CPAL_I2C_HAL_OA2_MASK_CONF(device, value)

#define	__CPAL_I2C_HAL_ENABLE_OA2(device) CPAL_I2C_DEVICE[(device)]->OAR2 \|= I2C_OAR2_OA2EN

#define	__CPAL_I2C_HAL_ENABLE_ADD10(device) CPAL_I2C_DEVICE[(device)]->CR2 \|= I2C_CR2_ADD10

#define	__CPAL_I2C_HAL_DISABLE_ADD10(device) CPAL_I2C_DEVICE[(device)]->CR2 &= ~I2C_CR2_ADD10

#define	__CPAL_I2C_HAL_ENABLE_COMPLETE_HEAD10R(device) CPAL_I2C_DEVICE[(device)]->CR2 &= ~I2C_CR2_HEAD10R

#define	__CPAL_I2C_HAL_DISABLE_COMPLETE_HEAD10R(device) CPAL_I2C_DEVICE[(device)]->CR2 \|= I2C_CR2_HEAD10R

#define	__CPAL_I2C_HAL_ENABLE_GENCALL(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= I2C_CR1_GCEN

#define	__CPAL_I2C_HAL_REQ_WRITE_TRANSFER(device) CPAL_I2C_DEVICE[(device)]->CR2 &= ~I2C_CR2_RD_WRN

#define	__CPAL_I2C_HAL_REQ_READ_TRANSFER(device) CPAL_I2C_DEVICE[(device)]->CR2 \|= I2C_CR2_RD_WRN

#define	__CPAL_I2C_HAL_GET_OA1(device) (uint32_t)(CPAL_I2C_DEVICE[(device)]->ISR & I2C_OAR1_OA1)

#define	__CPAL_I2C_HAL_GET_OA2(device) (uint32_t)(CPAL_I2C_DEVICE[(device)]->ISR & I2C_OAR2_OA2)

#define	__CPAL_I2C_HAL_GET_OA2_MASK(device) (uint32_t)((CPAL_I2C_DEVICE[(device)]->ISR & I2C_OAR2_OA2MSK) >> 8)

#define	__CPAL_I2C_HAL_GET_ADDCODE(device) (uint32_t)((CPAL_I2C_DEVICE[(device)]->ISR & I2C_ISR_ADDCODE) >> 17)

#define	__CPAL_I2C_HAL_GET_DIR(device) (uint32_t)(CPAL_I2C_DEVICE[(device)]->ISR & I2C_ISR_DIR)

#define	__CPAL_I2C_HAL_CR2_UPDATE(device, value) CPAL_I2C_DEVICE[(device)]->CR2 = value

#define	__CPAL_I2C_HAL_ENABLE_TXDMAREQ(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= I2C_CR1_TXDMAEN

#define	__CPAL_I2C_HAL_DISABLE_TXDMAREQ(device) CPAL_I2C_DEVICE[(device)]->CR1 &= ~I2C_CR1_TXDMAEN

#define	__CPAL_I2C_HAL_ENABLE_RXDMAREQ(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= I2C_CR1_RXDMAEN

#define	__CPAL_I2C_HAL_DISABLE_RXDMAREQ(device) CPAL_I2C_DEVICE[(device)]->CR1 &= ~I2C_CR1_RXDMAEN

#define	__CPAL_I2C_HAL_ENABLE_NACK(device) CPAL_I2C_DEVICE[(device)]->CR2 \|= I2C_CR2_NACK

#define	__CPAL_I2C_HAL_DISABLE_NACK(device) CPAL_I2C_DEVICE[(device)]->CR2 &= ~I2C_CR2_NACK

#define	__CPAL_I2C_HAL_ENABLE_AUTOEND(device) CPAL_I2C_DEVICE[(device)]->CR2 \|= I2C_CR2_AUTOEND

#define	__CPAL_I2C_HAL_DISABLE_AUTOEND(device) CPAL_I2C_DEVICE[(device)]->CR2 &= ~I2C_CR2_AUTOEND

#define	__CPAL_I2C_HAL_ENABLE_RELOAD(device) CPAL_I2C_DEVICE[(device)]->CR2 \|= I2C_CR2_RELOAD

#define	__CPAL_I2C_HAL_DISABLE_RELOAD(device) CPAL_I2C_DEVICE[(device)]->CR2 &= ~I2C_CR2_RELOAD

#define	__CPAL_I2C_HAL_ENABLE_NOSTRETCH(device) CPAL_I2C_DEVICE[(device)]->CR1 \|= I2C_CR1_NOSTRETCH

#define	__CPAL_I2C_HAL_DISABLE_NOSTRETCH(device) CPAL_I2C_DEVICE[(device)]->CR1 &= ~I2C_CR1_NOSTRETCH

#define	__CPAL_I2C_HAL_START(device) CPAL_I2C_DEVICE[(device)]->CR2 \|= I2C_CR2_START

#define	__CPAL_I2C_HAL_STOP(device) CPAL_I2C_DEVICE[(device)]->CR2 \|= I2C_CR2_STOP

#define	__CPAL_I2C_HAL_RECEIVE(device) (uint8_t)(CPAL_I2C_DEVICE[(device)]->RXDR)

#define	__CPAL_I2C_HAL_SEND(device, value) CPAL_I2C_DEVICE[(device)]->TXDR = (uint8_t)((value))

#define	__CPAL_I2C_HAL_SET_NBYTES(device, value)

#define	__CPAL_I2C_HAL_GET_NBYTES(device, value) (uint32_t)((CPAL_I2C_DEVICE[(device)]->CR2 & I2C_CR2_NBYTES) >> 16)

#define	__CPAL_I2C_HAL_CLEAR_NBYTES(device) CPAL_I2C_DEVICE[(device)]->CR2 &= ~I2C_CR2_NBYTES

#define	__CPAL_I2C_HAL_GET_EVENT(device) (uint32_t)(CPAL_I2C_DEVICE[(device)]->ISR & CPAL_I2C_STATUS_EVT_MASK)

#define	__CPAL_I2C_HAL_GET_ERROR(device) (uint32_t)(CPAL_I2C_DEVICE[(device)]->ISR & CPAL_I2C_STATUS_ERR_MASK)

#define	__CPAL_I2C_HAL_GET_TXE(device) (uint32_t)(CPAL_I2C_DEVICE[(device)]->ISR & I2C_ISR_TXE)

#define	__CPAL_I2C_HAL_GET_TXIS(device) (uint32_t)(CPAL_I2C_DEVICE[(device)]->ISR & I2C_ISR_TXIS)

#define	__CPAL_I2C_HAL_GET_RXNE(device) (uint32_t)(CPAL_I2C_DEVICE[(device)]->ISR & I2C_ISR_RXNE)

#define	__CPAL_I2C_HAL_GET_ADDR(device) (uint32_t)(CPAL_I2C_DEVICE[(device)]->ISR & I2C_ISR_ADDR)

#define	__CPAL_I2C_HAL_GET_NACK(device) (uint32_t)(CPAL_I2C_DEVICE[(device)]->ISR & I2C_ISR_NACKF)

#define	__CPAL_I2C_HAL_GET_STOP(device) (uint32_t)(CPAL_I2C_DEVICE[(device)]->ISR & I2C_ISR_STOPF)

#define	__CPAL_I2C_HAL_GET_TC(device) (uint32_t)(CPAL_I2C_DEVICE[(device)]->ISR & I2C_ISR_TC)

#define	__CPAL_I2C_HAL_GET_TCR(device) (uint32_t)(CPAL_I2C_DEVICE[(device)]->ISR & I2C_ISR_TCR)

#define	__CPAL_I2C_HAL_GET_BERR(device) (uint32_t)(CPAL_I2C_DEVICE[(device)]->ISR & I2C_ISR_BERR)

#define	__CPAL_I2C_HAL_GET_ARLO(device) (uint32_t)(CPAL_I2C_DEVICE[(device)]->ISR & I2C_ISR_ARLO)

#define	__CPAL_I2C_HAL_GET_OVR(device) (uint32_t)(CPAL_I2C_DEVICE[(device)]->ISR & I2C_ISR_OVR)

#define	__CPAL_I2C_HAL_GET_BUSY(device) (uint32_t)(CPAL_I2C_DEVICE[(device)]->ISR & I2C_ISR_BUSY)

#define	__CPAL_I2C_HAL_CLEAR_ADDR(device) CPAL_I2C_DEVICE[(device)]->ICR = I2C_ICR_ADDRCF

#define	__CPAL_I2C_HAL_CLEAR_NACK(device) CPAL_I2C_DEVICE[(device)]->ICR = I2C_ICR_NACKCF

#define	__CPAL_I2C_HAL_CLEAR_STOP(device) CPAL_I2C_DEVICE[(device)]->ICR = I2C_ICR_STOPCF

#define	__CPAL_I2C_HAL_CLEAR_BERR(device) CPAL_I2C_DEVICE[(device)]->ICR = I2C_ICR_BERRCF

#define	__CPAL_I2C_HAL_CLEAR_ARLO(device) CPAL_I2C_DEVICE[(device)]->ICR = I2C_ICR_ARLOCF

#define	__CPAL_I2C_HAL_CLEAR_OVR(device) CPAL_I2C_DEVICE[(device)]->ICR = I2C_ICR_OVRCF

Functions
void	CPAL_I2C_HAL_CLKInit (CPAL_DevTypeDef Device)
	Reset then enable the I2C device clock. More...

void	CPAL_I2C_HAL_CLKDeInit (CPAL_DevTypeDef Device)
	Reset then disable the I2C device clock. More...

void	CPAL_I2C_HAL_GPIOInit (CPAL_DevTypeDef Device)
	Configure the IO pins used by the I2C device. More...

void	CPAL_I2C_HAL_GPIODeInit (CPAL_DevTypeDef Device)
	Deinitialize the IO pins used by the I2C device (configured to their default state). More...

void	CPAL_I2C_HAL_ITInit (CPAL_DevTypeDef Device, uint32_t Options)
	Configure NVIC and interrupts used by I2C Device according to enabled options. More...

void	CPAL_I2C_HAL_ITDeInit (CPAL_DevTypeDef Device, uint32_t Options)
	Deinitialize NVIC and interrupts used by I2C Device in the current Configuration. More...

Detailed Description

This file contains all the functions prototypes for the CPAL_I2C_HAL firmware layer.

Author: MCD Application Team

Version: V1.0.0

Date: 20-April-2012

Attention

© COPYRIGHT 2012 STMicroelectronics

Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this file except in compliance with the License. You may obtain a copy of the License at:

   http://www.st.com/software_license_agreement_liberty_v2

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

Macro Definition Documentation

#define __CPAL_I2C_HAL_CLEAR_DMARX_IT ( device )

Value:

CPAL_I2C_DMA[(device)]->IFCR = (CPAL_I2C_DMA_RX_TC_FLAG[(device)] \

| CPAL_I2C_DMA_RX_HT_FLAG[(device)] | CPAL_I2C_DMA_RX_TE_FLAG[(device)])

#define __CPAL_I2C_HAL_CLEAR_DMATX_IT ( device )

Value:

CPAL_I2C_DMA[(device)]->IFCR = (CPAL_I2C_DMA_TX_TC_FLAG[(device)] \

| CPAL_I2C_DMA_TX_HT_FLAG[(device)] | CPAL_I2C_DMA_TX_TE_FLAG[(device)])

#define __CPAL_I2C_HAL_DISABLE_ALLIT ( device )

Value:

CPAL_I2C_DEVICE[(device)]->CR1 &= ~(I2C_CR1_TXIE | I2C_CR1_RXIE | I2C_CR1_ADDRIE | \

I2C_CR1_STOPIE | I2C_CR1_TCIE | I2C_CR1_ERRIE | I2C_CR1_NACKIE)

#define __CPAL_I2C_HAL_GET_DMARX_IT ( device )

Value:

(uint32_t)(CPAL_I2C_DMA[(device)]->ISR & (CPAL_I2C_DMA_RX_TC_FLAG[(device)] \

| CPAL_I2C_DMA_RX_HT_FLAG[(device)] | CPAL_I2C_DMA_RX_TE_FLAG[(device)]))

#define __CPAL_I2C_HAL_GET_DMATX_IT ( device )

Value:

(uint32_t)(CPAL_I2C_DMA[(device)]->ISR & (CPAL_I2C_DMA_TX_TC_FLAG[(device)] \

| CPAL_I2C_DMA_TX_HT_FLAG[(device)] | CPAL_I2C_DMA_TX_TE_FLAG[(device)]))

#define __CPAL_I2C_HAL_OA2_CONF	(	device,
		value
	)

Value:

CPAL_I2C_DEVICE[(device)]->OAR2 &= ~I2C_OAR2_OA2; \

CPAL_I2C_DEVICE[(device)]->OAR2 |= (uint32_t)((value) & 0x000000FE)

#define __CPAL_I2C_HAL_OA2_MASK_CONF	(	device,
		value
	)

Value:

CPAL_I2C_DEVICE[(device)]->OAR2 &= ~I2C_OAR2_OA2MSK; \

CPAL_I2C_DEVICE[(device)]->OAR2 |= (uint32_t)((value) << 8)

#define __CPAL_I2C_HAL_SADD_CONF	(	device,
		value
	)

Value:

CPAL_I2C_DEVICE[(device)]->CR2 &= ~I2C_CR2_SADD; \

CPAL_I2C_DEVICE[(device)]->CR2 |= (uint32_t)((value) & 0x000003FF)

#define __CPAL_I2C_HAL_SET_NBYTES	(	device,
		value
	)

Value:

CPAL_I2C_DEVICE[(device)]->CR2 &= ~I2C_CR2_NBYTES; \

CPAL_I2C_DEVICE[(device)]->CR2 |= (uint32_t)((uint32_t)(value) << 16)

#define __CPAL_I2C_HAL_SWRST ( device )

Value:

CPAL_I2C_DEVICE[(device)]->CR1 |= I2C_CR1_SWRST; \

CPAL_I2C_DEVICE[(device)]->CR1 &= ~I2C_CR1_SWRST

#define __I2C_RCC_RESET ( clk )

Value:

RCC_APB1PeriphResetCmd((clk),ENABLE);\

RCC_APB1PeriphResetCmd((clk),DISABLE)

#define CPAL_I2C_EVT_ADDR I2C_ISR_ADDR

Address matched

#define CPAL_I2C_EVT_NACK I2C_ISR_NACKF

NACK received

#define CPAL_I2C_EVT_RXNE I2C_ISR_RXNE

Receive Data Register not Empty

#define CPAL_I2C_EVT_STOP I2C_ISR_STOPF

Stop detection

#define CPAL_I2C_EVT_TC I2C_ISR_TC

Transfer Complete

#define CPAL_I2C_EVT_TCR I2C_ISR_TCR

Transfer Complete Reload

#define CPAL_I2C_EVT_TXIS I2C_ISR_TXIS

Transmit interrupt Status

#define CPAL_I2C_STATUS_ERR_MASK ((uint32_t)0x00000700)

I2C errors Mask

#define CPAL_I2C_STATUS_EVT_MASK ((uint16_t)0x0000000FE)

I2C event Mask for Status Register 1

Function Documentation

void CPAL_I2C_HAL_CLKDeInit ( CPAL_DevTypeDef Device )

Reset then disable the I2C device clock.

Parameters

Device : I2C Device instance

Return values

None.

void CPAL_I2C_HAL_CLKInit ( CPAL_DevTypeDef Device )

Reset then enable the I2C device clock.

Parameters

Device : I2C Device instance.

Return values

None

void CPAL_I2C_HAL_GPIODeInit ( CPAL_DevTypeDef Device )

Deinitialize the IO pins used by the I2C device (configured to their default state).

Parameters

Device : I2C Device instance.

Return values

None.

void CPAL_I2C_HAL_GPIOInit ( CPAL_DevTypeDef Device )

Configure the IO pins used by the I2C device.

Parameters

Device : I2C Device instance.

Return values

None.

void CPAL_I2C_HAL_ITDeInit	(	CPAL_DevTypeDef	Device,
		uint32_t	Options
	)

Deinitialize NVIC and interrupts used by I2C Device in the current Configuration.

Parameters

Device	: I2C Device instance.
Options	: I2C Transfer Options.

Return values

None.

void CPAL_I2C_HAL_ITInit	(	CPAL_DevTypeDef	Device,
		uint32_t	Options
	)

Configure NVIC and interrupts used by I2C Device according to enabled options.

Parameters

Device	: I2C Device instance.
Options	: I2C Transfer Options.

Return values

None.

Macros

Functions

Detailed Description

© COPYRIGHT 2012 STMicroelectronics

Macro Definition Documentation

Function Documentation