30 #ifndef __STM32F4xx_ADC_H
31 #define __STM32F4xx_ADC_H
38 #include "stm32f4xx.h"
55 uint32_t ADC_Resolution;
57 FunctionalState ADC_ScanConvMode;
61 FunctionalState ADC_ContinuousConvMode;
64 uint32_t ADC_ExternalTrigConvEdge;
68 uint32_t ADC_ExternalTrigConv;
72 uint32_t ADC_DataAlign;
75 uint8_t ADC_NbrOfConversion;
89 uint32_t ADC_Prescaler;
92 uint32_t ADC_DMAAccessMode;
96 uint32_t ADC_TwoSamplingDelay;
108 #define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
109 ((PERIPH) == ADC2) || \
115 #define ADC_Mode_Independent ((uint32_t)0x00000000)
116 #define ADC_DualMode_RegSimult_InjecSimult ((uint32_t)0x00000001)
117 #define ADC_DualMode_RegSimult_AlterTrig ((uint32_t)0x00000002)
118 #define ADC_DualMode_InjecSimult ((uint32_t)0x00000005)
119 #define ADC_DualMode_RegSimult ((uint32_t)0x00000006)
120 #define ADC_DualMode_Interl ((uint32_t)0x00000007)
121 #define ADC_DualMode_AlterTrig ((uint32_t)0x00000009)
122 #define ADC_TripleMode_RegSimult_InjecSimult ((uint32_t)0x00000011)
123 #define ADC_TripleMode_RegSimult_AlterTrig ((uint32_t)0x00000012)
124 #define ADC_TripleMode_InjecSimult ((uint32_t)0x00000015)
125 #define ADC_TripleMode_RegSimult ((uint32_t)0x00000016)
126 #define ADC_TripleMode_Interl ((uint32_t)0x00000017)
127 #define ADC_TripleMode_AlterTrig ((uint32_t)0x00000019)
128 #define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \
129 ((MODE) == ADC_DualMode_RegSimult_InjecSimult) || \
130 ((MODE) == ADC_DualMode_RegSimult_AlterTrig) || \
131 ((MODE) == ADC_DualMode_InjecSimult) || \
132 ((MODE) == ADC_DualMode_RegSimult) || \
133 ((MODE) == ADC_DualMode_Interl) || \
134 ((MODE) == ADC_DualMode_AlterTrig) || \
135 ((MODE) == ADC_TripleMode_RegSimult_InjecSimult) || \
136 ((MODE) == ADC_TripleMode_RegSimult_AlterTrig) || \
137 ((MODE) == ADC_TripleMode_InjecSimult) || \
138 ((MODE) == ADC_TripleMode_RegSimult) || \
139 ((MODE) == ADC_TripleMode_Interl) || \
140 ((MODE) == ADC_TripleMode_AlterTrig))
149 #define ADC_Prescaler_Div2 ((uint32_t)0x00000000)
150 #define ADC_Prescaler_Div4 ((uint32_t)0x00010000)
151 #define ADC_Prescaler_Div6 ((uint32_t)0x00020000)
152 #define ADC_Prescaler_Div8 ((uint32_t)0x00030000)
153 #define IS_ADC_PRESCALER(PRESCALER) (((PRESCALER) == ADC_Prescaler_Div2) || \
154 ((PRESCALER) == ADC_Prescaler_Div4) || \
155 ((PRESCALER) == ADC_Prescaler_Div6) || \
156 ((PRESCALER) == ADC_Prescaler_Div8))
165 #define ADC_DMAAccessMode_Disabled ((uint32_t)0x00000000)
166 #define ADC_DMAAccessMode_1 ((uint32_t)0x00004000)
167 #define ADC_DMAAccessMode_2 ((uint32_t)0x00008000)
168 #define ADC_DMAAccessMode_3 ((uint32_t)0x0000C000)
169 #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAAccessMode_Disabled) || \
170 ((MODE) == ADC_DMAAccessMode_1) || \
171 ((MODE) == ADC_DMAAccessMode_2) || \
172 ((MODE) == ADC_DMAAccessMode_3))
182 #define ADC_TwoSamplingDelay_5Cycles ((uint32_t)0x00000000)
183 #define ADC_TwoSamplingDelay_6Cycles ((uint32_t)0x00000100)
184 #define ADC_TwoSamplingDelay_7Cycles ((uint32_t)0x00000200)
185 #define ADC_TwoSamplingDelay_8Cycles ((uint32_t)0x00000300)
186 #define ADC_TwoSamplingDelay_9Cycles ((uint32_t)0x00000400)
187 #define ADC_TwoSamplingDelay_10Cycles ((uint32_t)0x00000500)
188 #define ADC_TwoSamplingDelay_11Cycles ((uint32_t)0x00000600)
189 #define ADC_TwoSamplingDelay_12Cycles ((uint32_t)0x00000700)
190 #define ADC_TwoSamplingDelay_13Cycles ((uint32_t)0x00000800)
191 #define ADC_TwoSamplingDelay_14Cycles ((uint32_t)0x00000900)
192 #define ADC_TwoSamplingDelay_15Cycles ((uint32_t)0x00000A00)
193 #define ADC_TwoSamplingDelay_16Cycles ((uint32_t)0x00000B00)
194 #define ADC_TwoSamplingDelay_17Cycles ((uint32_t)0x00000C00)
195 #define ADC_TwoSamplingDelay_18Cycles ((uint32_t)0x00000D00)
196 #define ADC_TwoSamplingDelay_19Cycles ((uint32_t)0x00000E00)
197 #define ADC_TwoSamplingDelay_20Cycles ((uint32_t)0x00000F00)
198 #define IS_ADC_SAMPLING_DELAY(DELAY) (((DELAY) == ADC_TwoSamplingDelay_5Cycles) || \
199 ((DELAY) == ADC_TwoSamplingDelay_6Cycles) || \
200 ((DELAY) == ADC_TwoSamplingDelay_7Cycles) || \
201 ((DELAY) == ADC_TwoSamplingDelay_8Cycles) || \
202 ((DELAY) == ADC_TwoSamplingDelay_9Cycles) || \
203 ((DELAY) == ADC_TwoSamplingDelay_10Cycles) || \
204 ((DELAY) == ADC_TwoSamplingDelay_11Cycles) || \
205 ((DELAY) == ADC_TwoSamplingDelay_12Cycles) || \
206 ((DELAY) == ADC_TwoSamplingDelay_13Cycles) || \
207 ((DELAY) == ADC_TwoSamplingDelay_14Cycles) || \
208 ((DELAY) == ADC_TwoSamplingDelay_15Cycles) || \
209 ((DELAY) == ADC_TwoSamplingDelay_16Cycles) || \
210 ((DELAY) == ADC_TwoSamplingDelay_17Cycles) || \
211 ((DELAY) == ADC_TwoSamplingDelay_18Cycles) || \
212 ((DELAY) == ADC_TwoSamplingDelay_19Cycles) || \
213 ((DELAY) == ADC_TwoSamplingDelay_20Cycles))
223 #define ADC_Resolution_12b ((uint32_t)0x00000000)
224 #define ADC_Resolution_10b ((uint32_t)0x01000000)
225 #define ADC_Resolution_8b ((uint32_t)0x02000000)
226 #define ADC_Resolution_6b ((uint32_t)0x03000000)
227 #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_Resolution_12b) || \
228 ((RESOLUTION) == ADC_Resolution_10b) || \
229 ((RESOLUTION) == ADC_Resolution_8b) || \
230 ((RESOLUTION) == ADC_Resolution_6b))
240 #define ADC_ExternalTrigConvEdge_None ((uint32_t)0x00000000)
241 #define ADC_ExternalTrigConvEdge_Rising ((uint32_t)0x10000000)
242 #define ADC_ExternalTrigConvEdge_Falling ((uint32_t)0x20000000)
243 #define ADC_ExternalTrigConvEdge_RisingFalling ((uint32_t)0x30000000)
244 #define IS_ADC_EXT_TRIG_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigConvEdge_None) || \
245 ((EDGE) == ADC_ExternalTrigConvEdge_Rising) || \
246 ((EDGE) == ADC_ExternalTrigConvEdge_Falling) || \
247 ((EDGE) == ADC_ExternalTrigConvEdge_RisingFalling))
256 #define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000)
257 #define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x01000000)
258 #define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x02000000)
259 #define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x03000000)
260 #define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x04000000)
261 #define ADC_ExternalTrigConv_T2_CC4 ((uint32_t)0x05000000)
262 #define ADC_ExternalTrigConv_T2_TRGO ((uint32_t)0x06000000)
263 #define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x07000000)
264 #define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x08000000)
265 #define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x09000000)
266 #define ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x0A000000)
267 #define ADC_ExternalTrigConv_T5_CC2 ((uint32_t)0x0B000000)
268 #define ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x0C000000)
269 #define ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x0D000000)
270 #define ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x0E000000)
271 #define ADC_ExternalTrigConv_Ext_IT11 ((uint32_t)0x0F000000)
272 #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \
273 ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \
274 ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \
275 ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \
276 ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \
277 ((REGTRIG) == ADC_ExternalTrigConv_T2_CC4) || \
278 ((REGTRIG) == ADC_ExternalTrigConv_T2_TRGO) || \
279 ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
280 ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \
281 ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \
282 ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \
283 ((REGTRIG) == ADC_ExternalTrigConv_T5_CC2) || \
284 ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3) || \
285 ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \
286 ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \
287 ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11))
296 #define ADC_DataAlign_Right ((uint32_t)0x00000000)
297 #define ADC_DataAlign_Left ((uint32_t)0x00000800)
298 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
299 ((ALIGN) == ADC_DataAlign_Left))
308 #define ADC_Channel_0 ((uint8_t)0x00)
309 #define ADC_Channel_1 ((uint8_t)0x01)
310 #define ADC_Channel_2 ((uint8_t)0x02)
311 #define ADC_Channel_3 ((uint8_t)0x03)
312 #define ADC_Channel_4 ((uint8_t)0x04)
313 #define ADC_Channel_5 ((uint8_t)0x05)
314 #define ADC_Channel_6 ((uint8_t)0x06)
315 #define ADC_Channel_7 ((uint8_t)0x07)
316 #define ADC_Channel_8 ((uint8_t)0x08)
317 #define ADC_Channel_9 ((uint8_t)0x09)
318 #define ADC_Channel_10 ((uint8_t)0x0A)
319 #define ADC_Channel_11 ((uint8_t)0x0B)
320 #define ADC_Channel_12 ((uint8_t)0x0C)
321 #define ADC_Channel_13 ((uint8_t)0x0D)
322 #define ADC_Channel_14 ((uint8_t)0x0E)
323 #define ADC_Channel_15 ((uint8_t)0x0F)
324 #define ADC_Channel_16 ((uint8_t)0x10)
325 #define ADC_Channel_17 ((uint8_t)0x11)
326 #define ADC_Channel_18 ((uint8_t)0x12)
328 #define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16)
329 #define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17)
330 #define ADC_Channel_Vbat ((uint8_t)ADC_Channel_18)
332 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || \
333 ((CHANNEL) == ADC_Channel_1) || \
334 ((CHANNEL) == ADC_Channel_2) || \
335 ((CHANNEL) == ADC_Channel_3) || \
336 ((CHANNEL) == ADC_Channel_4) || \
337 ((CHANNEL) == ADC_Channel_5) || \
338 ((CHANNEL) == ADC_Channel_6) || \
339 ((CHANNEL) == ADC_Channel_7) || \
340 ((CHANNEL) == ADC_Channel_8) || \
341 ((CHANNEL) == ADC_Channel_9) || \
342 ((CHANNEL) == ADC_Channel_10) || \
343 ((CHANNEL) == ADC_Channel_11) || \
344 ((CHANNEL) == ADC_Channel_12) || \
345 ((CHANNEL) == ADC_Channel_13) || \
346 ((CHANNEL) == ADC_Channel_14) || \
347 ((CHANNEL) == ADC_Channel_15) || \
348 ((CHANNEL) == ADC_Channel_16) || \
349 ((CHANNEL) == ADC_Channel_17) || \
350 ((CHANNEL) == ADC_Channel_18))
359 #define ADC_SampleTime_3Cycles ((uint8_t)0x00)
360 #define ADC_SampleTime_15Cycles ((uint8_t)0x01)
361 #define ADC_SampleTime_28Cycles ((uint8_t)0x02)
362 #define ADC_SampleTime_56Cycles ((uint8_t)0x03)
363 #define ADC_SampleTime_84Cycles ((uint8_t)0x04)
364 #define ADC_SampleTime_112Cycles ((uint8_t)0x05)
365 #define ADC_SampleTime_144Cycles ((uint8_t)0x06)
366 #define ADC_SampleTime_480Cycles ((uint8_t)0x07)
367 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_3Cycles) || \
368 ((TIME) == ADC_SampleTime_15Cycles) || \
369 ((TIME) == ADC_SampleTime_28Cycles) || \
370 ((TIME) == ADC_SampleTime_56Cycles) || \
371 ((TIME) == ADC_SampleTime_84Cycles) || \
372 ((TIME) == ADC_SampleTime_112Cycles) || \
373 ((TIME) == ADC_SampleTime_144Cycles) || \
374 ((TIME) == ADC_SampleTime_480Cycles))
383 #define ADC_ExternalTrigInjecConvEdge_None ((uint32_t)0x00000000)
384 #define ADC_ExternalTrigInjecConvEdge_Rising ((uint32_t)0x00100000)
385 #define ADC_ExternalTrigInjecConvEdge_Falling ((uint32_t)0x00200000)
386 #define ADC_ExternalTrigInjecConvEdge_RisingFalling ((uint32_t)0x00300000)
387 #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigInjecConvEdge_None) || \
388 ((EDGE) == ADC_ExternalTrigInjecConvEdge_Rising) || \
389 ((EDGE) == ADC_ExternalTrigInjecConvEdge_Falling) || \
390 ((EDGE) == ADC_ExternalTrigInjecConvEdge_RisingFalling))
400 #define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00000000)
401 #define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00010000)
402 #define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00020000)
403 #define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00030000)
404 #define ADC_ExternalTrigInjecConv_T3_CC2 ((uint32_t)0x00040000)
405 #define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00050000)
406 #define ADC_ExternalTrigInjecConv_T4_CC1 ((uint32_t)0x00060000)
407 #define ADC_ExternalTrigInjecConv_T4_CC2 ((uint32_t)0x00070000)
408 #define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00080000)
409 #define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00090000)
410 #define ADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x000A0000)
411 #define ADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x000B0000)
412 #define ADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x000C0000)
413 #define ADC_ExternalTrigInjecConv_T8_CC3 ((uint32_t)0x000D0000)
414 #define ADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x000E0000)
415 #define ADC_ExternalTrigInjecConv_Ext_IT15 ((uint32_t)0x000F0000)
416 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \
417 ((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \
418 ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \
419 ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \
420 ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC2) || \
421 ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \
422 ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC1) || \
423 ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC2) || \
424 ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \
425 ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \
426 ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4) || \
427 ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \
428 ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \
429 ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC3) || \
430 ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \
431 ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15))
440 #define ADC_InjectedChannel_1 ((uint8_t)0x14)
441 #define ADC_InjectedChannel_2 ((uint8_t)0x18)
442 #define ADC_InjectedChannel_3 ((uint8_t)0x1C)
443 #define ADC_InjectedChannel_4 ((uint8_t)0x20)
444 #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \
445 ((CHANNEL) == ADC_InjectedChannel_2) || \
446 ((CHANNEL) == ADC_InjectedChannel_3) || \
447 ((CHANNEL) == ADC_InjectedChannel_4))
456 #define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200)
457 #define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200)
458 #define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200)
459 #define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000)
460 #define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000)
461 #define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000)
462 #define ADC_AnalogWatchdog_None ((uint32_t)0x00000000)
463 #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
464 ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \
465 ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \
466 ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \
467 ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \
468 ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \
469 ((WATCHDOG) == ADC_AnalogWatchdog_None))
478 #define ADC_IT_EOC ((uint16_t)0x0205)
479 #define ADC_IT_AWD ((uint16_t)0x0106)
480 #define ADC_IT_JEOC ((uint16_t)0x0407)
481 #define ADC_IT_OVR ((uint16_t)0x201A)
482 #define IS_ADC_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \
483 ((IT) == ADC_IT_JEOC)|| ((IT) == ADC_IT_OVR))
492 #define ADC_FLAG_AWD ((uint8_t)0x01)
493 #define ADC_FLAG_EOC ((uint8_t)0x02)
494 #define ADC_FLAG_JEOC ((uint8_t)0x04)
495 #define ADC_FLAG_JSTRT ((uint8_t)0x08)
496 #define ADC_FLAG_STRT ((uint8_t)0x10)
497 #define ADC_FLAG_OVR ((uint8_t)0x20)
499 #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xC0) == 0x00) && ((FLAG) != 0x00))
500 #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || \
501 ((FLAG) == ADC_FLAG_EOC) || \
502 ((FLAG) == ADC_FLAG_JEOC) || \
503 ((FLAG)== ADC_FLAG_JSTRT) || \
504 ((FLAG) == ADC_FLAG_STRT) || \
505 ((FLAG)== ADC_FLAG_OVR))
514 #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)
523 #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)
532 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4))
541 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4))
550 #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10))
559 #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10))
568 #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8))
589 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
612 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
629 void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState);