30 #ifndef __STM32F37X_TIM_H
31 #define __STM32F37X_TIM_H
38 #include "stm32f37x.h"
57 uint16_t TIM_Prescaler;
60 uint16_t TIM_CounterMode;
68 uint16_t TIM_ClockDivision;
71 uint8_t TIM_RepetitionCounter;
91 uint16_t TIM_OutputState;
94 uint16_t TIM_OutputNState;
102 uint16_t TIM_OCPolarity;
105 uint16_t TIM_OCNPolarity;
109 uint16_t TIM_OCIdleState;
113 uint16_t TIM_OCNIdleState;
126 uint16_t TIM_Channel;
129 uint16_t TIM_ICPolarity;
132 uint16_t TIM_ICSelection;
135 uint16_t TIM_ICPrescaler;
138 uint16_t TIM_ICFilter;
150 uint16_t TIM_OSSRState;
153 uint16_t TIM_OSSIState;
156 uint16_t TIM_LOCKLevel;
159 uint16_t TIM_DeadTime;
166 uint16_t TIM_BreakPolarity;
169 uint16_t TIM_AutomaticOutput;
178 #define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM2) || \
179 ((PERIPH) == TIM3) || \
180 ((PERIPH) == TIM4) || \
181 ((PERIPH) == TIM5) || \
182 ((PERIPH) == TIM6) || \
183 ((PERIPH) == TIM7) || \
184 ((PERIPH) == TIM12)|| \
185 ((PERIPH) == TIM13)|| \
186 ((PERIPH) == TIM14)|| \
187 ((PERIPH) == TIM15)|| \
188 ((PERIPH) == TIM16)|| \
189 ((PERIPH) == TIM17)|| \
190 ((PERIPH) == TIM18)|| \
194 #define IS_TIM_LIST1_PERIPH(PERIPH) ((PERIPH) == TIM14)
197 #define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM15)|| \
198 ((PERIPH) == TIM16)|| \
202 #define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM2) || \
203 ((PERIPH) == TIM3) || \
204 ((PERIPH) == TIM4) || \
205 ((PERIPH) == TIM5) || \
209 #define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM2) || \
210 ((PERIPH) == TIM3) || \
211 ((PERIPH) == TIM4) || \
212 ((PERIPH) == TIM5) || \
213 ((PERIPH) == TIM15)|| \
214 ((PERIPH) == TIM16)|| \
215 ((PERIPH) == TIM17) || \
219 #define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM2) || \
220 ((PERIPH) == TIM3) || \
221 ((PERIPH) == TIM4) || \
222 ((PERIPH) == TIM5) || \
223 ((PERIPH) == TIM15) || \
227 #define IS_TIM_LIST6_PERIPH(PERIPH) (((PERIPH) == TIM2) || \
228 ((PERIPH) == TIM3) || \
229 ((PERIPH) == TIM4) || \
230 ((PERIPH) == TIM5) || \
231 ((PERIPH) == TIM12)|| \
232 ((PERIPH) == TIM15)|| \
236 #define IS_TIM_LIST7_PERIPH(PERIPH) (((PERIPH) == TIM2) || \
237 ((PERIPH) == TIM3) || \
238 ((PERIPH) == TIM4) || \
239 ((PERIPH) == TIM5) || \
240 ((PERIPH) == TIM6) || \
241 ((PERIPH) == TIM7) || \
242 ((PERIPH) == TIM12)|| \
243 ((PERIPH) == TIM15)|| \
244 ((PERIPH) == TIM18)|| \
248 #define IS_TIM_LIST8_PERIPH(PERIPH) (((PERIPH) == TIM2) || \
249 ((PERIPH) == TIM3) || \
250 ((PERIPH) == TIM4) || \
251 ((PERIPH) == TIM5) || \
252 ((PERIPH) == TIM12)|| \
253 ((PERIPH) == TIM13)|| \
254 ((PERIPH) == TIM14)|| \
255 ((PERIPH) == TIM15)|| \
256 ((PERIPH) == TIM16)|| \
257 ((PERIPH) == TIM17)|| \
261 #define IS_TIM_LIST9_PERIPH(PERIPH) (((PERIPH) == TIM2) || \
262 ((PERIPH) == TIM3) || \
263 ((PERIPH) == TIM4) || \
264 ((PERIPH) == TIM5) || \
265 ((PERIPH) == TIM6) || \
266 ((PERIPH) == TIM7) || \
267 ((PERIPH) == TIM15)|| \
268 ((PERIPH) == TIM16)|| \
269 ((PERIPH) == TIM17)|| \
270 ((PERIPH) == TIM18)|| \
281 #define TIM_OCMode_Timing ((uint16_t)0x0000)
282 #define TIM_OCMode_Active ((uint16_t)0x0010)
283 #define TIM_OCMode_Inactive ((uint16_t)0x0020)
284 #define TIM_OCMode_Toggle ((uint16_t)0x0030)
285 #define TIM_OCMode_PWM1 ((uint16_t)0x0060)
286 #define TIM_OCMode_PWM2 ((uint16_t)0x0070)
287 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \
288 ((MODE) == TIM_OCMode_Active) || \
289 ((MODE) == TIM_OCMode_Inactive) || \
290 ((MODE) == TIM_OCMode_Toggle)|| \
291 ((MODE) == TIM_OCMode_PWM1) || \
292 ((MODE) == TIM_OCMode_PWM2))
293 #define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \
294 ((MODE) == TIM_OCMode_Active) || \
295 ((MODE) == TIM_OCMode_Inactive) || \
296 ((MODE) == TIM_OCMode_Toggle)|| \
297 ((MODE) == TIM_OCMode_PWM1) || \
298 ((MODE) == TIM_OCMode_PWM2) || \
299 ((MODE) == TIM_ForcedAction_Active) || \
300 ((MODE) == TIM_ForcedAction_InActive))
309 #define TIM_OPMode_Single ((uint16_t)0x0008)
310 #define TIM_OPMode_Repetitive ((uint16_t)0x0000)
311 #define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \
312 ((MODE) == TIM_OPMode_Repetitive))
321 #define TIM_Channel_1 ((uint16_t)0x0000)
322 #define TIM_Channel_2 ((uint16_t)0x0004)
323 #define TIM_Channel_3 ((uint16_t)0x0008)
324 #define TIM_Channel_4 ((uint16_t)0x000C)
325 #define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
326 ((CHANNEL) == TIM_Channel_2) || \
327 ((CHANNEL) == TIM_Channel_3) || \
328 ((CHANNEL) == TIM_Channel_4))
329 #define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
330 ((CHANNEL) == TIM_Channel_2))
331 #define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
332 ((CHANNEL) == TIM_Channel_2) || \
333 ((CHANNEL) == TIM_Channel_3))
342 #define TIM_CKD_DIV1 ((uint16_t)0x0000)
343 #define TIM_CKD_DIV2 ((uint16_t)0x0100)
344 #define TIM_CKD_DIV4 ((uint16_t)0x0200)
345 #define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \
346 ((DIV) == TIM_CKD_DIV2) || \
347 ((DIV) == TIM_CKD_DIV4))
356 #define TIM_CounterMode_Up ((uint16_t)0x0000)
357 #define TIM_CounterMode_Down ((uint16_t)0x0010)
358 #define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020)
359 #define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040)
360 #define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060)
361 #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \
362 ((MODE) == TIM_CounterMode_Down) || \
363 ((MODE) == TIM_CounterMode_CenterAligned1) || \
364 ((MODE) == TIM_CounterMode_CenterAligned2) || \
365 ((MODE) == TIM_CounterMode_CenterAligned3))
374 #define TIM_OCPolarity_High ((uint16_t)0x0000)
375 #define TIM_OCPolarity_Low ((uint16_t)0x0002)
376 #define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \
377 ((POLARITY) == TIM_OCPolarity_Low))
386 #define TIM_OCNPolarity_High ((uint16_t)0x0000)
387 #define TIM_OCNPolarity_Low ((uint16_t)0x0008)
388 #define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \
389 ((POLARITY) == TIM_OCNPolarity_Low))
398 #define TIM_OutputState_Disable ((uint16_t)0x0000)
399 #define TIM_OutputState_Enable ((uint16_t)0x0001)
400 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \
401 ((STATE) == TIM_OutputState_Enable))
410 #define TIM_OutputNState_Disable ((uint16_t)0x0000)
411 #define TIM_OutputNState_Enable ((uint16_t)0x0004)
412 #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \
413 ((STATE) == TIM_OutputNState_Enable))
422 #define TIM_CCx_Enable ((uint16_t)0x0001)
423 #define TIM_CCx_Disable ((uint16_t)0x0000)
424 #define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \
425 ((CCX) == TIM_CCx_Disable))
434 #define TIM_CCxN_Enable ((uint16_t)0x0004)
435 #define TIM_CCxN_Disable ((uint16_t)0x0000)
436 #define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \
437 ((CCXN) == TIM_CCxN_Disable))
446 #define TIM_Break_Enable ((uint16_t)0x1000)
447 #define TIM_Break_Disable ((uint16_t)0x0000)
448 #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \
449 ((STATE) == TIM_Break_Disable))
458 #define TIM_BreakPolarity_Low ((uint16_t)0x0000)
459 #define TIM_BreakPolarity_High ((uint16_t)0x2000)
460 #define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \
461 ((POLARITY) == TIM_BreakPolarity_High))
470 #define TIM_AutomaticOutput_Enable ((uint16_t)0x4000)
471 #define TIM_AutomaticOutput_Disable ((uint16_t)0x0000)
472 #define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \
473 ((STATE) == TIM_AutomaticOutput_Disable))
482 #define TIM_LOCKLevel_OFF ((uint16_t)0x0000)
483 #define TIM_LOCKLevel_1 ((uint16_t)0x0100)
484 #define TIM_LOCKLevel_2 ((uint16_t)0x0200)
485 #define TIM_LOCKLevel_3 ((uint16_t)0x0300)
486 #define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \
487 ((LEVEL) == TIM_LOCKLevel_1) || \
488 ((LEVEL) == TIM_LOCKLevel_2) || \
489 ((LEVEL) == TIM_LOCKLevel_3))
498 #define TIM_OSSIState_Enable ((uint16_t)0x0400)
499 #define TIM_OSSIState_Disable ((uint16_t)0x0000)
500 #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \
501 ((STATE) == TIM_OSSIState_Disable))
510 #define TIM_OSSRState_Enable ((uint16_t)0x0800)
511 #define TIM_OSSRState_Disable ((uint16_t)0x0000)
512 #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \
513 ((STATE) == TIM_OSSRState_Disable))
522 #define TIM_OCIdleState_Set ((uint16_t)0x0100)
523 #define TIM_OCIdleState_Reset ((uint16_t)0x0000)
524 #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \
525 ((STATE) == TIM_OCIdleState_Reset))
534 #define TIM_OCNIdleState_Set ((uint16_t)0x0200)
535 #define TIM_OCNIdleState_Reset ((uint16_t)0x0000)
536 #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \
537 ((STATE) == TIM_OCNIdleState_Reset))
546 #define TIM_ICPolarity_Rising ((uint16_t)0x0000)
547 #define TIM_ICPolarity_Falling ((uint16_t)0x0002)
548 #define TIM_ICPolarity_BothEdge ((uint16_t)0x000A)
549 #define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \
550 ((POLARITY) == TIM_ICPolarity_Falling))
551 #define IS_TIM_IC_POLARITY_LITE(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \
552 ((POLARITY) == TIM_ICPolarity_Falling)|| \
553 ((POLARITY) == TIM_ICPolarity_BothEdge))
562 #define TIM_ICSelection_DirectTI ((uint16_t)0x0001)
564 #define TIM_ICSelection_IndirectTI ((uint16_t)0x0002)
566 #define TIM_ICSelection_TRC ((uint16_t)0x0003)
567 #define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \
568 ((SELECTION) == TIM_ICSelection_IndirectTI) || \
569 ((SELECTION) == TIM_ICSelection_TRC))
578 #define TIM_ICPSC_DIV1 ((uint16_t)0x0000)
579 #define TIM_ICPSC_DIV2 ((uint16_t)0x0004)
580 #define TIM_ICPSC_DIV4 ((uint16_t)0x0008)
581 #define TIM_ICPSC_DIV8 ((uint16_t)0x000C)
582 #define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \
583 ((PRESCALER) == TIM_ICPSC_DIV2) || \
584 ((PRESCALER) == TIM_ICPSC_DIV4) || \
585 ((PRESCALER) == TIM_ICPSC_DIV8))
594 #define TIM_IT_Update ((uint16_t)0x0001)
595 #define TIM_IT_CC1 ((uint16_t)0x0002)
596 #define TIM_IT_CC2 ((uint16_t)0x0004)
597 #define TIM_IT_CC3 ((uint16_t)0x0008)
598 #define TIM_IT_CC4 ((uint16_t)0x0010)
599 #define TIM_IT_COM ((uint16_t)0x0020)
600 #define TIM_IT_Trigger ((uint16_t)0x0040)
601 #define TIM_IT_Break ((uint16_t)0x0080)
602 #define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000))
604 #define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \
605 ((IT) == TIM_IT_CC1) || \
606 ((IT) == TIM_IT_CC2) || \
607 ((IT) == TIM_IT_CC3) || \
608 ((IT) == TIM_IT_CC4) || \
609 ((IT) == TIM_IT_COM) || \
610 ((IT) == TIM_IT_Trigger) || \
611 ((IT) == TIM_IT_Break))
620 #define TIM_DMABase_CR1 ((uint16_t)0x0000)
621 #define TIM_DMABase_CR2 ((uint16_t)0x0001)
622 #define TIM_DMABase_SMCR ((uint16_t)0x0002)
623 #define TIM_DMABase_DIER ((uint16_t)0x0003)
624 #define TIM_DMABase_SR ((uint16_t)0x0004)
625 #define TIM_DMABase_EGR ((uint16_t)0x0005)
626 #define TIM_DMABase_CCMR1 ((uint16_t)0x0006)
627 #define TIM_DMABase_CCMR2 ((uint16_t)0x0007)
628 #define TIM_DMABase_CCER ((uint16_t)0x0008)
629 #define TIM_DMABase_CNT ((uint16_t)0x0009)
630 #define TIM_DMABase_PSC ((uint16_t)0x000A)
631 #define TIM_DMABase_ARR ((uint16_t)0x000B)
632 #define TIM_DMABase_RCR ((uint16_t)0x000C)
633 #define TIM_DMABase_CCR1 ((uint16_t)0x000D)
634 #define TIM_DMABase_CCR2 ((uint16_t)0x000E)
635 #define TIM_DMABase_CCR3 ((uint16_t)0x000F)
636 #define TIM_DMABase_CCR4 ((uint16_t)0x0010)
637 #define TIM_DMABase_BDTR ((uint16_t)0x0011)
638 #define TIM_DMABase_DCR ((uint16_t)0x0012)
639 #define TIM_DMABase_OR ((uint16_t)0x0013)
640 #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \
641 ((BASE) == TIM_DMABase_CR2) || \
642 ((BASE) == TIM_DMABase_SMCR) || \
643 ((BASE) == TIM_DMABase_DIER) || \
644 ((BASE) == TIM_DMABase_SR) || \
645 ((BASE) == TIM_DMABase_EGR) || \
646 ((BASE) == TIM_DMABase_CCMR1) || \
647 ((BASE) == TIM_DMABase_CCMR2) || \
648 ((BASE) == TIM_DMABase_CCER) || \
649 ((BASE) == TIM_DMABase_CNT) || \
650 ((BASE) == TIM_DMABase_PSC) || \
651 ((BASE) == TIM_DMABase_ARR) || \
652 ((BASE) == TIM_DMABase_RCR) || \
653 ((BASE) == TIM_DMABase_CCR1) || \
654 ((BASE) == TIM_DMABase_CCR2) || \
655 ((BASE) == TIM_DMABase_CCR3) || \
656 ((BASE) == TIM_DMABase_CCR4) || \
657 ((BASE) == TIM_DMABase_BDTR) || \
658 ((BASE) == TIM_DMABase_OR) || \
659 ((BASE) == TIM_DMABase_DCR))
668 #define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000)
669 #define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100)
670 #define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200)
671 #define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300)
672 #define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400)
673 #define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500)
674 #define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600)
675 #define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700)
676 #define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800)
677 #define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900)
678 #define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00)
679 #define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00)
680 #define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00)
681 #define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00)
682 #define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00)
683 #define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00)
684 #define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000)
685 #define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100)
686 #define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) || \
687 ((LENGTH) == TIM_DMABurstLength_2Transfers) || \
688 ((LENGTH) == TIM_DMABurstLength_3Transfers) || \
689 ((LENGTH) == TIM_DMABurstLength_4Transfers) || \
690 ((LENGTH) == TIM_DMABurstLength_5Transfers) || \
691 ((LENGTH) == TIM_DMABurstLength_6Transfers) || \
692 ((LENGTH) == TIM_DMABurstLength_7Transfers) || \
693 ((LENGTH) == TIM_DMABurstLength_8Transfers) || \
694 ((LENGTH) == TIM_DMABurstLength_9Transfers) || \
695 ((LENGTH) == TIM_DMABurstLength_10Transfers) || \
696 ((LENGTH) == TIM_DMABurstLength_11Transfers) || \
697 ((LENGTH) == TIM_DMABurstLength_12Transfers) || \
698 ((LENGTH) == TIM_DMABurstLength_13Transfers) || \
699 ((LENGTH) == TIM_DMABurstLength_14Transfers) || \
700 ((LENGTH) == TIM_DMABurstLength_15Transfers) || \
701 ((LENGTH) == TIM_DMABurstLength_16Transfers) || \
702 ((LENGTH) == TIM_DMABurstLength_17Transfers) || \
703 ((LENGTH) == TIM_DMABurstLength_18Transfers))
712 #define TIM_DMA_Update ((uint16_t)0x0100)
713 #define TIM_DMA_CC1 ((uint16_t)0x0200)
714 #define TIM_DMA_CC2 ((uint16_t)0x0400)
715 #define TIM_DMA_CC3 ((uint16_t)0x0800)
716 #define TIM_DMA_CC4 ((uint16_t)0x1000)
717 #define TIM_DMA_COM ((uint16_t)0x2000)
718 #define TIM_DMA_Trigger ((uint16_t)0x4000)
719 #define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000))
729 #define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000)
730 #define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000)
731 #define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)
732 #define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)
733 #define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \
734 ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \
735 ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \
736 ((PRESCALER) == TIM_ExtTRGPSC_DIV8))
745 #define TIM_TS_ITR0 ((uint16_t)0x0000)
746 #define TIM_TS_ITR1 ((uint16_t)0x0010)
747 #define TIM_TS_ITR2 ((uint16_t)0x0020)
748 #define TIM_TS_ITR3 ((uint16_t)0x0030)
749 #define TIM_TS_TI1F_ED ((uint16_t)0x0040)
750 #define TIM_TS_TI1FP1 ((uint16_t)0x0050)
751 #define TIM_TS_TI2FP2 ((uint16_t)0x0060)
752 #define TIM_TS_ETRF ((uint16_t)0x0070)
753 #define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
754 ((SELECTION) == TIM_TS_ITR1) || \
755 ((SELECTION) == TIM_TS_ITR2) || \
756 ((SELECTION) == TIM_TS_ITR3) || \
757 ((SELECTION) == TIM_TS_TI1F_ED) || \
758 ((SELECTION) == TIM_TS_TI1FP1) || \
759 ((SELECTION) == TIM_TS_TI2FP2) || \
760 ((SELECTION) == TIM_TS_ETRF))
761 #define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
762 ((SELECTION) == TIM_TS_ITR1) || \
763 ((SELECTION) == TIM_TS_ITR2) || \
764 ((SELECTION) == TIM_TS_ITR3))
773 #define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050)
774 #define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060)
775 #define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)
776 #define IS_TIM_TIXCLK_SOURCE(SOURCE) (((SOURCE) == TIM_TIxExternalCLK1Source_TI1) || \
777 ((SOURCE) == TIM_TIxExternalCLK1Source_TI2) || \
778 ((SOURCE) == TIM_TIxExternalCLK1Source_TI1ED))
786 #define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000)
787 #define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)
788 #define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \
789 ((POLARITY) == TIM_ExtTRGPolarity_NonInverted))
798 #define TIM_PSCReloadMode_Update ((uint16_t)0x0000)
799 #define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)
800 #define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \
801 ((RELOAD) == TIM_PSCReloadMode_Immediate))
810 #define TIM_ForcedAction_Active ((uint16_t)0x0050)
811 #define TIM_ForcedAction_InActive ((uint16_t)0x0040)
812 #define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \
813 ((ACTION) == TIM_ForcedAction_InActive))
822 #define TIM_EncoderMode_TI1 ((uint16_t)0x0001)
823 #define TIM_EncoderMode_TI2 ((uint16_t)0x0002)
824 #define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
825 #define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \
826 ((MODE) == TIM_EncoderMode_TI2) || \
827 ((MODE) == TIM_EncoderMode_TI12))
837 #define TIM_EventSource_Update ((uint16_t)0x0001)
838 #define TIM_EventSource_CC1 ((uint16_t)0x0002)
839 #define TIM_EventSource_CC2 ((uint16_t)0x0004)
840 #define TIM_EventSource_CC3 ((uint16_t)0x0008)
841 #define TIM_EventSource_CC4 ((uint16_t)0x0010)
842 #define TIM_EventSource_COM ((uint16_t)0x0020)
843 #define TIM_EventSource_Trigger ((uint16_t)0x0040)
844 #define TIM_EventSource_Break ((uint16_t)0x0080)
845 #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000))
855 #define TIM_UpdateSource_Global ((uint16_t)0x0000)
858 #define TIM_UpdateSource_Regular ((uint16_t)0x0001)
859 #define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \
860 ((SOURCE) == TIM_UpdateSource_Regular))
869 #define TIM_OCPreload_Enable ((uint16_t)0x0008)
870 #define TIM_OCPreload_Disable ((uint16_t)0x0000)
871 #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \
872 ((STATE) == TIM_OCPreload_Disable))
881 #define TIM_OCFast_Enable ((uint16_t)0x0004)
882 #define TIM_OCFast_Disable ((uint16_t)0x0000)
883 #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \
884 ((STATE) == TIM_OCFast_Disable))
894 #define TIM_OCClear_Enable ((uint16_t)0x0080)
895 #define TIM_OCClear_Disable ((uint16_t)0x0000)
896 #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \
897 ((STATE) == TIM_OCClear_Disable))
906 #define TIM_TRGOSource_Reset ((uint16_t)0x0000)
907 #define TIM_TRGOSource_Enable ((uint16_t)0x0010)
908 #define TIM_TRGOSource_Update ((uint16_t)0x0020)
909 #define TIM_TRGOSource_OC1 ((uint16_t)0x0030)
910 #define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040)
911 #define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)
912 #define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)
913 #define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)
914 #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \
915 ((SOURCE) == TIM_TRGOSource_Enable) || \
916 ((SOURCE) == TIM_TRGOSource_Update) || \
917 ((SOURCE) == TIM_TRGOSource_OC1) || \
918 ((SOURCE) == TIM_TRGOSource_OC1Ref) || \
919 ((SOURCE) == TIM_TRGOSource_OC2Ref) || \
920 ((SOURCE) == TIM_TRGOSource_OC3Ref) || \
921 ((SOURCE) == TIM_TRGOSource_OC4Ref))
930 #define TIM_SlaveMode_Reset ((uint16_t)0x0004)
931 #define TIM_SlaveMode_Gated ((uint16_t)0x0005)
932 #define TIM_SlaveMode_Trigger ((uint16_t)0x0006)
933 #define TIM_SlaveMode_External1 ((uint16_t)0x0007)
934 #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \
935 ((MODE) == TIM_SlaveMode_Gated) || \
936 ((MODE) == TIM_SlaveMode_Trigger) || \
937 ((MODE) == TIM_SlaveMode_External1))
946 #define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)
947 #define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)
948 #define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \
949 ((STATE) == TIM_MasterSlaveMode_Disable))
958 #define TIM_FLAG_Update ((uint16_t)0x0001)
959 #define TIM_FLAG_CC1 ((uint16_t)0x0002)
960 #define TIM_FLAG_CC2 ((uint16_t)0x0004)
961 #define TIM_FLAG_CC3 ((uint16_t)0x0008)
962 #define TIM_FLAG_CC4 ((uint16_t)0x0010)
963 #define TIM_FLAG_COM ((uint16_t)0x0020)
964 #define TIM_FLAG_Trigger ((uint16_t)0x0040)
965 #define TIM_FLAG_Break ((uint16_t)0x0080)
966 #define TIM_FLAG_CC1OF ((uint16_t)0x0200)
967 #define TIM_FLAG_CC2OF ((uint16_t)0x0400)
968 #define TIM_FLAG_CC3OF ((uint16_t)0x0800)
969 #define TIM_FLAG_CC4OF ((uint16_t)0x1000)
970 #define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \
971 ((FLAG) == TIM_FLAG_CC1) || \
972 ((FLAG) == TIM_FLAG_CC2) || \
973 ((FLAG) == TIM_FLAG_CC3) || \
974 ((FLAG) == TIM_FLAG_CC4) || \
975 ((FLAG) == TIM_FLAG_COM) || \
976 ((FLAG) == TIM_FLAG_Trigger) || \
977 ((FLAG) == TIM_FLAG_Break) || \
978 ((FLAG) == TIM_FLAG_CC1OF) || \
979 ((FLAG) == TIM_FLAG_CC2OF) || \
980 ((FLAG) == TIM_FLAG_CC3OF) || \
981 ((FLAG) == TIM_FLAG_CC4OF))
984 #define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint16_t)0xE100) == 0x0000) && ((TIM_FLAG) != 0x0000))
993 #define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
1002 #define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF)
1010 #define TIM_OCReferenceClear_ETRF ((uint16_t)0x0008)
1011 #define TIM_OCReferenceClear_OCREFCLR ((uint16_t)0x0000)
1012 #define TIM_OCREFERENCECECLEAR_SOURCE(SOURCE) (((SOURCE) == TIM_OCReferenceClear_ETRF) || \
1013 ((SOURCE) == TIM_OCReferenceClear_OCREFCLR))
1022 #define TIM14_GPIO ((uint16_t)0x0000)
1023 #define TIM14_RTC_CLK ((uint16_t)0x0001)
1024 #define TIM14_HSEDiv32 ((uint16_t)0x0002)
1025 #define TIM14_MCO ((uint16_t)0x0003)
1027 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM14_GPIO)|| \
1028 ((TIM_REMAP) == TIM14_RTC_CLK) || \
1029 ((TIM_REMAP) == TIM14_HSEDiv32) || \
1030 ((TIM_REMAP) == TIM14_MCO))
1039 #define TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer
1040 #define TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers
1041 #define TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers
1042 #define TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers
1043 #define TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers
1044 #define TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers
1045 #define TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers
1046 #define TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers
1047 #define TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers
1048 #define TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers
1049 #define TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers
1050 #define TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers
1051 #define TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers
1052 #define TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers
1053 #define TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers
1054 #define TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers
1055 #define TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers
1056 #define TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers
1072 void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode);
1083 void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);
1096 void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode);
1121 void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
1123 void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
1126 void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx);
1127 void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN);
1128 void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState);
1144 void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState);
1150 void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength);
1151 void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState);
1158 uint16_t TIM_ICPolarity, uint16_t ICFilter);
1160 uint16_t ExtTRGFilter);
1162 uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter);
1170 void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
1171 uint16_t ExtTRGFilter);
1175 uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity);