STM32F37 Standard Peripheral bibliotheek  1.0
ST Microelectronics bibliotheek documentatie voor de STM32F37 Standard Peripheral Library
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Peripheral clocks configuration functions

Peripheral clocks configuration functions. More...

Functions

void RCC_RTCCLKConfig (uint32_t RCC_RTCCLKSource)
 Configures the RTC clock (RTCCLK). More...
 
void RCC_RTCCLKCmd (FunctionalState NewState)
 Enables or disables the RTC clock. More...
 
void RCC_BackupResetCmd (FunctionalState NewState)
 Forces or releases the Backup domain reset. More...
 
void RCC_AHBPeriphClockCmd (uint32_t RCC_AHBPeriph, FunctionalState NewState)
 Enables or disables the AHB peripheral clock. More...
 
void RCC_APB2PeriphClockCmd (uint32_t RCC_APB2Periph, FunctionalState NewState)
 Enables or disables the High Speed APB (APB2) peripheral clock. More...
 
void RCC_APB1PeriphClockCmd (uint32_t RCC_APB1Periph, FunctionalState NewState)
 Enables or disables the Low Speed APB (APB1) peripheral clock. More...
 
void RCC_AHBPeriphResetCmd (uint32_t RCC_AHBPeriph, FunctionalState NewState)
 Forces or releases AHB peripheral reset. More...
 
void RCC_APB2PeriphResetCmd (uint32_t RCC_APB2Periph, FunctionalState NewState)
 Forces or releases High Speed APB (APB2) peripheral reset. More...
 
void RCC_APB1PeriphResetCmd (uint32_t RCC_APB1Periph, FunctionalState NewState)
 Forces or releases Low Speed APB (APB1) peripheral reset. More...
 

Detailed Description

Peripheral clocks configuration functions.

 ===============================================================================
             #####Peripheral clocks configuration functions #####
 ===============================================================================
    [..] This section provides functions allowing to configure the Peripheral clocks. 
         (#) The RTC clock which is derived from the LSE, LSI or  HSE_Div32 (HSE
             divided by 32).
         (#) After restart from Reset or wakeup from STANDBY, all peripherals are off
             except internal SRAM, Flash and SWD. Before to start using a peripheral you
             have to enable its interface clock. You can do this using RCC_AHBPeriphClockCmd(),
             RCC_APB2PeriphClockCmd() and RCC_APB1PeriphClockCmd() functions.
         (#) To reset the peripherals configuration (to the default state after device reset)
             you can use RCC_AHBPeriphResetCmd(), RCC_APB2PeriphResetCmd() and 
             RCC_APB1PeriphResetCmd() functions.

Function Documentation

void RCC_AHBPeriphClockCmd ( uint32_t  RCC_AHBPeriph,
FunctionalState  NewState 
)

Enables or disables the AHB peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.
Parameters
RCC_AHBPeriph,:specifies the AHB peripheral to gates its clock. This parameter can be any combination of the following values:
  • RCC_AHBPeriph_GPIOA: GPIOA clock
  • RCC_AHBPeriph_GPIOB: GPIOB clock
  • RCC_AHBPeriph_GPIOC: GPIOC clock
  • RCC_AHBPeriph_GPIOD: GPIOD clock
  • RCC_AHBPeriph_GPIOE: GPIOE clock
  • RCC_AHBPeriph_GPIOF: GPIOF clock
  • RCC_AHBPeriph_TS: TS clock
  • RCC_AHBPeriph_CRC: CRC clock
  • RCC_AHBPeriph_FLITF: (has effect only when the Flash memory is in power down mode)
  • RCC_AHBPeriph_SRAM: SRAM clock
  • RCC_AHBPeriph_DMA2: DMA2 clock
  • RCC_AHBPeriph_DMA1: DMA1 clock
NewState,:new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_AHBPeriphResetCmd ( uint32_t  RCC_AHBPeriph,
FunctionalState  NewState 
)

Forces or releases AHB peripheral reset.

Parameters
RCC_AHBPeriph,:specifies the AHB peripheral to reset. This parameter can be any combination of the following values:
  • RCC_AHBPeriph_GPIOA: GPIOA clock
  • RCC_AHBPeriph_GPIOB: GPIOB clock
  • RCC_AHBPeriph_GPIOC: GPIOC clock
  • RCC_AHBPeriph_GPIOD: GPIOD clock
  • RCC_AHBPeriph_GPIOE: GPIOE clock
  • RCC_AHBPeriph_GPIOF: GPIOF clock
  • RCC_AHBPeriph_TS: TS clock
NewState,:new state of the specified peripheral reset. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_APB1PeriphClockCmd ( uint32_t  RCC_APB1Periph,
FunctionalState  NewState 
)

Enables or disables the Low Speed APB (APB1) peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.
Parameters
RCC_APB1Periph,:specifies the APB1 peripheral to gates its clock. This parameter can be any combination of the following values:
  • RCC_APB1Periph_TIM2: TIM2 clock
  • RCC_APB1Periph_TIM3: TIM3 clock
  • RCC_APB1Periph_TIM4: TIM4 clock
  • RCC_APB1Periph_TIM5: TIM5 clock
  • RCC_APB1Periph_TIM6: TIM6 clock
  • RCC_APB1Periph_TIM7: TIM7 clock
  • RCC_APB1Periph_TIM12: TIM12 clock
  • RCC_APB1Periph_TIM13: TIM13 clock
  • RCC_APB1Periph_TIM14: TIM14 clock
  • RCC_APB1Periph_TIM18: TIM18 clock
  • RCC_APB1Periph_WWDG: WWDG clock
  • RCC_APB1Periph_SPI2: SPI2 clock
  • RCC_APB1Periph_SPI3: SPI3 clock
  • RCC_APB1Periph_USART2: USART2 clock
  • RCC_APB1Periph_USART3: USART3 clock
  • RCC_APB1Periph_I2C1: I2C1 clock
  • RCC_APB1Periph_I2C2: I2C2 clock
  • RCC_APB1Periph_USB: USB clock
  • RCC_APB1Periph_CAN1: CAN1 clock
  • RCC_APB1Periph_DAC2: DAC2 clock
  • RCC_APB1Periph_PWR: PWR clock
  • RCC_APB1Periph_DAC1: DAC1 clock
  • RCC_APB1Periph_CEC: CEC clock
NewState,:new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_APB1PeriphResetCmd ( uint32_t  RCC_APB1Periph,
FunctionalState  NewState 
)

Forces or releases Low Speed APB (APB1) peripheral reset.

Parameters
RCC_APB1Periph,:specifies the APB1 peripheral to reset. This parameter can be any combination of the following values:
  • RCC_APB1Periph_TIM2: TIM2 clock
  • RCC_APB1Periph_TIM3: TIM3 clock
  • RCC_APB1Periph_TIM4: TIM4 clock
  • RCC_APB1Periph_TIM5: TIM5 clock
  • RCC_APB1Periph_TIM6: TIM6 clock
  • RCC_APB1Periph_TIM7: TIM7 clock
  • RCC_APB1Periph_TIM12: TIM12 clock
  • RCC_APB1Periph_TIM13: TIM13 clock
  • RCC_APB1Periph_TIM14: TIM14 clock
  • RCC_APB1Periph_TIM18: TIM18 clock
  • RCC_APB1Periph_WWDG: WWDG clock
  • RCC_APB1Periph_SPI2: SPI2 clock
  • RCC_APB1Periph_SPI3: SPI3 clock
  • RCC_APB1Periph_USART2: USART2 clock
  • RCC_APB1Periph_USART3: USART3 clock
  • RCC_APB1Periph_I2C1: I2C1 clock
  • RCC_APB1Periph_I2C2: I2C2 clock
  • RCC_APB1Periph_USB: USB clock
  • RCC_APB1Periph_CAN1: CAN1 clock
  • RCC_APB1Periph_DAC2: DAC2 clock
  • RCC_APB1Periph_PWR: PWR clock
  • RCC_APB1Periph_DAC1: DAC1 clock
  • RCC_APB1Periph_CEC: CEC clock
NewState,:new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_APB2PeriphClockCmd ( uint32_t  RCC_APB2Periph,
FunctionalState  NewState 
)

Enables or disables the High Speed APB (APB2) peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.
Parameters
RCC_APB2Periph,:specifies the APB2 peripheral to gates its clock. This parameter can be any combination of the following values:
  • RCC_APB2Periph_SYSCFG: SYSCFG clock
  • RCC_APB2Periph_ADC1: ADC1 clock
  • RCC_APB2Periph_SPI1: SPI1 clock
  • RCC_APB2Periph_USART1: USART1 clock
  • RCC_APB2Periph_TIM15: TIM15 clock
  • RCC_APB2Periph_TIM16: TIM16 clock
  • RCC_APB2Periph_TIM17: TIM17 clock
  • RCC_APB2Periph_TIM19: TIM19 clock
  • RCC_APB2Periph_SDADC1: SDADC1 clock
  • RCC_APB2Periph_SDADC2: SDADC2 clock
  • RCC_APB2Periph_SDADC3: SDADC3 clock
NewState,:new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_APB2PeriphResetCmd ( uint32_t  RCC_APB2Periph,
FunctionalState  NewState 
)

Forces or releases High Speed APB (APB2) peripheral reset.

Parameters
RCC_APB2Periph,:specifies the APB2 peripheral to reset. This parameter can be any combination of the following values:
  • RCC_APB2Periph_SYSCFG: SYSCFG clock
  • RCC_APB2Periph_ADC1: ADC1 clock
  • RCC_APB2Periph_SPI1: SPI1 clock
  • RCC_APB2Periph_USART1: USART1 clock
  • RCC_APB2Periph_TIM15: TIM15 clock
  • RCC_APB2Periph_TIM16: TIM16 clock
  • RCC_APB2Periph_TIM17: TIM17 clock
  • RCC_APB2Periph_TIM19: TIM19 clock
  • RCC_APB2Periph_SDADC1: SDADC1 clock
  • RCC_APB2Periph_SDADC2: SDADC2 clock
  • RCC_APB2Periph_SDADC3: SDADC3 clock
NewState,:new state of the specified peripheral reset. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_BackupResetCmd ( FunctionalState  NewState)

Forces or releases the Backup domain reset.

Note
This function resets the RTC peripheral (including the backup registers) and the RTC clock source selection in RCC_BDCR register.
Parameters
NewState,:new state of the Backup domain reset. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_RTCCLKCmd ( FunctionalState  NewState)

Enables or disables the RTC clock.

Note
This function must be used only after the RTC clock source was selected using the RCC_RTCCLKConfig function.
Parameters
NewState,:new state of the RTC clock. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_RTCCLKConfig ( uint32_t  RCC_RTCCLKSource)

Configures the RTC clock (RTCCLK).

Note
As the RTC clock configuration bits are in the Backup domain and write access is denied to this domain after reset, you have to enable write access using PWR_BackupAccessCmd(ENABLE) function before to configure the RTC clock source (to be done once after reset).
Once the RTC clock is configured it can't be changed unless the RTC is reset using RCC_BackupResetCmd function, or by a Power On Reset (POR)
Parameters
RCC_RTCCLKSource,:specifies the RTC clock source. This parameter can be one of the following values:
  • RCC_RTCCLKSource_LSE: LSE selected as RTC clock
  • RCC_RTCCLKSource_LSI: LSI selected as RTC clock
  • RCC_RTCCLKSource_HSE_Div32: HSE divided by 32 selected as RTC clock
Note
If the LSE or LSI is used as RTC clock source, the RTC continues to work in STOP and STANDBY modes, and can be used as wakeup source. However, when the HSE clock is used as RTC clock source, the RTC cannot be used in STOP and STANDBY modes.
The maximum input clock frequency for RTC is 2MHz (when using HSE as RTC clock source).
Return values
None