STM32F0 Standard Peripheral bibliotheek  1.0
ST Microelectronics standard peripheral bibliotheek documentatie voor de STM32F0 familie
 All Data Structures Files Functions Variables Enumerations Enumerator Groups
stm32f0xx_spi.h
Go to the documentation of this file.
1 
29 /* Define to prevent recursive inclusion -------------------------------------*/
30 #ifndef __STM32F0XX_SPI_H
31 #define __STM32F0XX_SPI_H
32 
33 #ifdef __cplusplus
34  extern "C" {
35 #endif
36 
37 /* Includes ------------------------------------------------------------------*/
38 #include "stm32f0xx.h"
39 
48 /* Exported types ------------------------------------------------------------*/
49 
54 typedef struct
55 {
56  uint16_t SPI_Direction;
59  uint16_t SPI_Mode;
62  uint16_t SPI_DataSize;
65  uint16_t SPI_CPOL;
68  uint16_t SPI_CPHA;
71  uint16_t SPI_NSS;
75  uint16_t SPI_BaudRatePrescaler;
81  uint16_t SPI_FirstBit;
84  uint16_t SPI_CRCPolynomial;
85 }SPI_InitTypeDef;
86 
87 
92 typedef struct
93 {
94  uint16_t I2S_Mode;
97  uint16_t I2S_Standard;
100  uint16_t I2S_DataFormat;
103  uint16_t I2S_MCLKOutput;
106  uint32_t I2S_AudioFreq;
109  uint16_t I2S_CPOL;
111 }I2S_InitTypeDef;
112 
113 /* Exported constants --------------------------------------------------------*/
114 
119 #define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
120  ((PERIPH) == SPI2))
121 
122 #define IS_SPI_1_PERIPH(PERIPH) (((PERIPH) == SPI1))
123 
128 #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
129 #define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
130 #define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
131 #define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
132 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
133  ((MODE) == SPI_Direction_2Lines_RxOnly) || \
134  ((MODE) == SPI_Direction_1Line_Rx) || \
135  ((MODE) == SPI_Direction_1Line_Tx))
136 
144 #define SPI_Mode_Master ((uint16_t)0x0104)
145 #define SPI_Mode_Slave ((uint16_t)0x0000)
146 #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
147  ((MODE) == SPI_Mode_Slave))
148 
156 #define SPI_DataSize_4b ((uint16_t)0x0300)
157 #define SPI_DataSize_5b ((uint16_t)0x0400)
158 #define SPI_DataSize_6b ((uint16_t)0x0500)
159 #define SPI_DataSize_7b ((uint16_t)0x0600)
160 #define SPI_DataSize_8b ((uint16_t)0x0700)
161 #define SPI_DataSize_9b ((uint16_t)0x0800)
162 #define SPI_DataSize_10b ((uint16_t)0x0900)
163 #define SPI_DataSize_11b ((uint16_t)0x0A00)
164 #define SPI_DataSize_12b ((uint16_t)0x0B00)
165 #define SPI_DataSize_13b ((uint16_t)0x0C00)
166 #define SPI_DataSize_14b ((uint16_t)0x0D00)
167 #define SPI_DataSize_15b ((uint16_t)0x0E00)
168 #define SPI_DataSize_16b ((uint16_t)0x0F00)
169 #define IS_SPI_DATA_SIZE(SIZE) (((SIZE) == SPI_DataSize_4b) || \
170  ((SIZE) == SPI_DataSize_5b) || \
171  ((SIZE) == SPI_DataSize_6b) || \
172  ((SIZE) == SPI_DataSize_7b) || \
173  ((SIZE) == SPI_DataSize_8b) || \
174  ((SIZE) == SPI_DataSize_9b) || \
175  ((SIZE) == SPI_DataSize_10b) || \
176  ((SIZE) == SPI_DataSize_11b) || \
177  ((SIZE) == SPI_DataSize_12b) || \
178  ((SIZE) == SPI_DataSize_13b) || \
179  ((SIZE) == SPI_DataSize_14b) || \
180  ((SIZE) == SPI_DataSize_15b) || \
181  ((SIZE) == SPI_DataSize_16b))
182 
190 #define SPI_CRCLength_8b ((uint16_t)0x0000)
191 #define SPI_CRCLength_16b SPI_CR1_CRCL
192 #define IS_SPI_CRC_LENGTH(LENGTH) (((LENGTH) == SPI_CRCLength_8b) || \
193  ((LENGTH) == SPI_CRCLength_16b))
194 
202 #define SPI_CPOL_Low ((uint16_t)0x0000)
203 #define SPI_CPOL_High SPI_CR1_CPOL
204 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
205  ((CPOL) == SPI_CPOL_High))
206 
214 #define SPI_CPHA_1Edge ((uint16_t)0x0000)
215 #define SPI_CPHA_2Edge SPI_CR1_CPHA
216 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
217  ((CPHA) == SPI_CPHA_2Edge))
218 
226 #define SPI_NSS_Soft SPI_CR1_SSM
227 #define SPI_NSS_Hard ((uint16_t)0x0000)
228 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
229  ((NSS) == SPI_NSS_Hard))
230 
238 #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
239 #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
240 #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
241 #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
242 #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
243 #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
244 #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
245 #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
246 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
247  ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
248  ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
249  ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
250  ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
251  ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
252  ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
253  ((PRESCALER) == SPI_BaudRatePrescaler_256))
254 
262 #define SPI_FirstBit_MSB ((uint16_t)0x0000)
263 #define SPI_FirstBit_LSB SPI_CR1_LSBFIRST
264 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
265  ((BIT) == SPI_FirstBit_LSB))
266 
274 #define I2S_Mode_SlaveTx ((uint16_t)0x0000)
275 #define I2S_Mode_SlaveRx ((uint16_t)0x0100)
276 #define I2S_Mode_MasterTx ((uint16_t)0x0200)
277 #define I2S_Mode_MasterRx ((uint16_t)0x0300)
278 #define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
279  ((MODE) == I2S_Mode_SlaveRx) || \
280  ((MODE) == I2S_Mode_MasterTx)|| \
281  ((MODE) == I2S_Mode_MasterRx))
282 
290 #define I2S_Standard_Phillips ((uint16_t)0x0000)
291 #define I2S_Standard_MSB ((uint16_t)0x0010)
292 #define I2S_Standard_LSB ((uint16_t)0x0020)
293 #define I2S_Standard_PCMShort ((uint16_t)0x0030)
294 #define I2S_Standard_PCMLong ((uint16_t)0x00B0)
295 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
296  ((STANDARD) == I2S_Standard_MSB) || \
297  ((STANDARD) == I2S_Standard_LSB) || \
298  ((STANDARD) == I2S_Standard_PCMShort) || \
299  ((STANDARD) == I2S_Standard_PCMLong))
300 
308 #define I2S_DataFormat_16b ((uint16_t)0x0000)
309 #define I2S_DataFormat_16bextended ((uint16_t)0x0001)
310 #define I2S_DataFormat_24b ((uint16_t)0x0003)
311 #define I2S_DataFormat_32b ((uint16_t)0x0005)
312 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
313  ((FORMAT) == I2S_DataFormat_16bextended) || \
314  ((FORMAT) == I2S_DataFormat_24b) || \
315  ((FORMAT) == I2S_DataFormat_32b))
316 
324 #define I2S_MCLKOutput_Enable SPI_I2SPR_MCKOE
325 #define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
326 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
327  ((OUTPUT) == I2S_MCLKOutput_Disable))
328 
336 #define I2S_AudioFreq_192k ((uint32_t)192000)
337 #define I2S_AudioFreq_96k ((uint32_t)96000)
338 #define I2S_AudioFreq_48k ((uint32_t)48000)
339 #define I2S_AudioFreq_44k ((uint32_t)44100)
340 #define I2S_AudioFreq_32k ((uint32_t)32000)
341 #define I2S_AudioFreq_22k ((uint32_t)22050)
342 #define I2S_AudioFreq_16k ((uint32_t)16000)
343 #define I2S_AudioFreq_11k ((uint32_t)11025)
344 #define I2S_AudioFreq_8k ((uint32_t)8000)
345 #define I2S_AudioFreq_Default ((uint32_t)2)
346 
347 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
348  ((FREQ) <= I2S_AudioFreq_192k)) || \
349  ((FREQ) == I2S_AudioFreq_Default))
350 
358 #define I2S_CPOL_Low ((uint16_t)0x0000)
359 #define I2S_CPOL_High SPI_I2SCFGR_CKPOL
360 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
361  ((CPOL) == I2S_CPOL_High))
362 
370 #define SPI_RxFIFOThreshold_HF ((uint16_t)0x0000)
371 #define SPI_RxFIFOThreshold_QF SPI_CR2_FRXTH
372 #define IS_SPI_RX_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SPI_RxFIFOThreshold_HF) || \
373  ((THRESHOLD) == SPI_RxFIFOThreshold_QF))
374 
382 #define SPI_I2S_DMAReq_Tx SPI_CR2_TXDMAEN
383 #define SPI_I2S_DMAReq_Rx SPI_CR2_RXDMAEN
384 #define IS_SPI_I2S_DMA_REQ(REQ) ((((REQ) & (uint16_t)0xFFFC) == 0x00) && ((REQ) != 0x00))
385 
393 #define SPI_LastDMATransfer_TxEvenRxEven ((uint16_t)0x0000)
394 #define SPI_LastDMATransfer_TxOddRxEven ((uint16_t)0x4000)
395 #define SPI_LastDMATransfer_TxEvenRxOdd ((uint16_t)0x2000)
396 #define SPI_LastDMATransfer_TxOddRxOdd ((uint16_t)0x6000)
397 #define IS_SPI_LAST_DMA_TRANSFER(TRANSFER) (((TRANSFER) == SPI_LastDMATransfer_TxEvenRxEven) || \
398  ((TRANSFER) == SPI_LastDMATransfer_TxOddRxEven) || \
399  ((TRANSFER) == SPI_LastDMATransfer_TxEvenRxOdd) || \
400  ((TRANSFER) == SPI_LastDMATransfer_TxOddRxOdd))
401 
408 #define SPI_NSSInternalSoft_Set SPI_CR1_SSI
409 #define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
410 #define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
411  ((INTERNAL) == SPI_NSSInternalSoft_Reset))
412 
420 #define SPI_CRC_Tx ((uint8_t)0x00)
421 #define SPI_CRC_Rx ((uint8_t)0x01)
422 #define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
423 
431 #define SPI_Direction_Rx ((uint16_t)0xBFFF)
432 #define SPI_Direction_Tx ((uint16_t)0x4000)
433 #define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
434  ((DIRECTION) == SPI_Direction_Tx))
435 
443 #define SPI_I2S_IT_TXE ((uint8_t)0x71)
444 #define SPI_I2S_IT_RXNE ((uint8_t)0x60)
445 #define SPI_I2S_IT_ERR ((uint8_t)0x50)
446 
447 #define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
448  ((IT) == SPI_I2S_IT_RXNE) || \
449  ((IT) == SPI_I2S_IT_ERR))
450 
451 #define I2S_IT_UDR ((uint8_t)0x53)
452 #define SPI_IT_MODF ((uint8_t)0x55)
453 #define SPI_I2S_IT_OVR ((uint8_t)0x56)
454 #define SPI_I2S_IT_FRE ((uint8_t)0x58)
455 
456 #define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
457  ((IT) == SPI_I2S_IT_OVR) || ((IT) == SPI_IT_MODF) || \
458  ((IT) == SPI_I2S_IT_FRE)|| ((IT) == I2S_IT_UDR))
459 
468 #define SPI_TransmissionFIFOStatus_Empty ((uint16_t)0x0000)
469 #define SPI_TransmissionFIFOStatus_1QuarterFull ((uint16_t)0x0800)
470 #define SPI_TransmissionFIFOStatus_HalfFull ((uint16_t)0x1000)
471 #define SPI_TransmissionFIFOStatus_Full ((uint16_t)0x1800)
472 
480 #define SPI_ReceptionFIFOStatus_Empty ((uint16_t)0x0000)
481 #define SPI_ReceptionFIFOStatus_1QuarterFull ((uint16_t)0x0200)
482 #define SPI_ReceptionFIFOStatus_HalfFull ((uint16_t)0x0400)
483 #define SPI_ReceptionFIFOStatus_Full ((uint16_t)0x0600)
484 
494 #define SPI_I2S_FLAG_RXNE SPI_SR_RXNE
495 #define SPI_I2S_FLAG_TXE SPI_SR_TXE
496 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
497 #define I2S_FLAG_UDR SPI_SR_UDR
498 #define SPI_FLAG_CRCERR SPI_SR_CRCERR
499 #define SPI_FLAG_MODF SPI_SR_MODF
500 #define SPI_I2S_FLAG_OVR SPI_SR_OVR
501 #define SPI_I2S_FLAG_BSY SPI_SR_BSY
502 #define SPI_I2S_FLAG_FRE SPI_SR_FRE
503 
504 
505 
506 #define IS_SPI_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
507 #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
508  ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
509  ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE)|| \
510  ((FLAG) == SPI_I2S_FLAG_FRE)|| ((FLAG) == I2S_FLAG_CHSIDE)|| \
511  ((FLAG) == I2S_FLAG_UDR))
512 
520 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
521 
529 /* Exported macro ------------------------------------------------------------*/
530 /* Exported functions ------------------------------------------------------- */
531 
532 /* Initialization and Configuration functions *********************************/
533 void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
534 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
535 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
536 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
537 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
538 void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
539 void SPI_NSSPulseModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
540 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
541 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
542 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
543 void SPI_RxFIFOThresholdConfig(SPI_TypeDef* SPIx, uint16_t SPI_RxFIFOThreshold);
544 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
545 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
546 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
547 
548 /* Data transfers functions ***************************************************/
549 void SPI_SendData8(SPI_TypeDef* SPIx, uint8_t Data);
550 void SPI_I2S_SendData16(SPI_TypeDef* SPIx, uint16_t Data);
551 uint8_t SPI_ReceiveData8(SPI_TypeDef* SPIx);
552 uint16_t SPI_I2S_ReceiveData16(SPI_TypeDef* SPIx);
553 
554 /* Hardware CRC Calculation functions *****************************************/
555 void SPI_CRCLengthConfig(SPI_TypeDef* SPIx, uint16_t SPI_CRCLength);
556 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
557 void SPI_TransmitCRC(SPI_TypeDef* SPIx);
558 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
559 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
560 
561 /* DMA transfers management functions *****************************************/
562 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
563 void SPI_LastDMATransferCmd(SPI_TypeDef* SPIx, uint16_t SPI_LastDMATransfer);
564 
565 /* Interrupts and flags management functions **********************************/
566 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
567 uint16_t SPI_GetTransmissionFIFOStatus(SPI_TypeDef* SPIx);
568 uint16_t SPI_GetReceptionFIFOStatus(SPI_TypeDef* SPIx);
569 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
570 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
571 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
572 
573 #ifdef __cplusplus
574 }
575 #endif
576 
577 #endif /*__STM32F0XX_SPI_H */
578 
587 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/