30 #ifndef __STM32F0XX_I2C_H
31 #define __STM32F0XX_I2C_H
38 #include "stm32f0xx.h"
59 uint32_t I2C_AnalogFilter;
62 uint32_t I2C_DigitalFilter;
68 uint32_t I2C_OwnAddress1;
74 uint32_t I2C_AcknowledgedAddress;
85 #define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \
88 #define IS_I2C_1_PERIPH(PERIPH) ((PERIPH) == I2C1)
94 #define I2C_AnalogFilter_Enable ((uint32_t)0x00000000)
95 #define I2C_AnalogFilter_Disable I2C_CR1_ANFOFF
97 #define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_AnalogFilter_Enable) || \
98 ((FILTER) == I2C_AnalogFilter_Disable))
107 #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000F)
116 #define I2C_Mode_I2C ((uint32_t)0x00000000)
117 #define I2C_Mode_SMBusDevice I2C_CR1_SMBDEN
118 #define I2C_Mode_SMBusHost I2C_CR1_SMBHEN
120 #define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \
121 ((MODE) == I2C_Mode_SMBusDevice) || \
122 ((MODE) == I2C_Mode_SMBusHost))
131 #define I2C_Ack_Enable ((uint32_t)0x00000000)
132 #define I2C_Ack_Disable I2C_CR2_NACK
134 #define IS_I2C_ACK(ACK) (((ACK) == I2C_Ack_Enable) || \
135 ((ACK) == I2C_Ack_Disable))
144 #define I2C_AcknowledgedAddress_7bit ((uint32_t)0x00000000)
145 #define I2C_AcknowledgedAddress_10bit I2C_OAR1_OA1MODE
147 #define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
148 ((ADDRESS) == I2C_AcknowledgedAddress_10bit))
157 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF)
166 #define I2C_Direction_Transmitter ((uint16_t)0x0000)
167 #define I2C_Direction_Receiver ((uint16_t)0x0400)
169 #define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \
170 ((DIRECTION) == I2C_Direction_Receiver))
179 #define I2C_DMAReq_Tx I2C_CR1_TXDMAEN
180 #define I2C_DMAReq_Rx I2C_CR1_RXDMAEN
182 #define IS_I2C_DMA_REQ(REQ) ((((REQ) & (uint32_t)0xFFFF3FFF) == 0x00) && ((REQ) != 0x00))
191 #define IS_I2C_SLAVE_ADDRESS(ADDRESS) ((ADDRESS) <= (uint16_t)0x03FF)
201 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF)
211 #define I2C_OA2_NoMask ((uint8_t)0x00)
212 #define I2C_OA2_Mask01 ((uint8_t)0x01)
213 #define I2C_OA2_Mask02 ((uint8_t)0x02)
214 #define I2C_OA2_Mask03 ((uint8_t)0x03)
215 #define I2C_OA2_Mask04 ((uint8_t)0x04)
216 #define I2C_OA2_Mask05 ((uint8_t)0x05)
217 #define I2C_OA2_Mask06 ((uint8_t)0x06)
218 #define I2C_OA2_Mask07 ((uint8_t)0x07)
220 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NoMask) || \
221 ((MASK) == I2C_OA2_Mask01) || \
222 ((MASK) == I2C_OA2_Mask02) || \
223 ((MASK) == I2C_OA2_Mask03) || \
224 ((MASK) == I2C_OA2_Mask04) || \
225 ((MASK) == I2C_OA2_Mask05) || \
226 ((MASK) == I2C_OA2_Mask06) || \
227 ((MASK) == I2C_OA2_Mask07))
237 #define IS_I2C_TIMEOUT(TIMEOUT) ((TIMEOUT) <= (uint16_t)0x0FFF)
247 #define I2C_Register_CR1 ((uint8_t)0x00)
248 #define I2C_Register_CR2 ((uint8_t)0x04)
249 #define I2C_Register_OAR1 ((uint8_t)0x08)
250 #define I2C_Register_OAR2 ((uint8_t)0x0C)
251 #define I2C_Register_TIMINGR ((uint8_t)0x10)
252 #define I2C_Register_TIMEOUTR ((uint8_t)0x14)
253 #define I2C_Register_ISR ((uint8_t)0x18)
254 #define I2C_Register_ICR ((uint8_t)0x1C)
255 #define I2C_Register_PECR ((uint8_t)0x20)
256 #define I2C_Register_RXDR ((uint8_t)0x24)
257 #define I2C_Register_TXDR ((uint8_t)0x28)
259 #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \
260 ((REGISTER) == I2C_Register_CR2) || \
261 ((REGISTER) == I2C_Register_OAR1) || \
262 ((REGISTER) == I2C_Register_OAR2) || \
263 ((REGISTER) == I2C_Register_TIMINGR) || \
264 ((REGISTER) == I2C_Register_TIMEOUTR) || \
265 ((REGISTER) == I2C_Register_ISR) || \
266 ((REGISTER) == I2C_Register_ICR) || \
267 ((REGISTER) == I2C_Register_PECR) || \
268 ((REGISTER) == I2C_Register_RXDR) || \
269 ((REGISTER) == I2C_Register_TXDR))
278 #define I2C_IT_ERRI I2C_CR1_ERRIE
279 #define I2C_IT_TCI I2C_CR1_TCIE
280 #define I2C_IT_STOPI I2C_CR1_STOPIE
281 #define I2C_IT_NACKI I2C_CR1_NACKIE
282 #define I2C_IT_ADDRI I2C_CR1_ADDRIE
283 #define I2C_IT_RXI I2C_CR1_RXIE
284 #define I2C_IT_TXI I2C_CR1_TXIE
286 #define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint32_t)0xFFFFFF01) == 0x00) && ((IT) != 0x00))
296 #define I2C_FLAG_TXE I2C_ISR_TXE
297 #define I2C_FLAG_TXIS I2C_ISR_TXIS
298 #define I2C_FLAG_RXNE I2C_ISR_RXNE
299 #define I2C_FLAG_ADDR I2C_ISR_ADDR
300 #define I2C_FLAG_NACKF I2C_ISR_NACKF
301 #define I2C_FLAG_STOPF I2C_ISR_STOPF
302 #define I2C_FLAG_TC I2C_ISR_TC
303 #define I2C_FLAG_TCR I2C_ISR_TCR
304 #define I2C_FLAG_BERR I2C_ISR_BERR
305 #define I2C_FLAG_ARLO I2C_ISR_ARLO
306 #define I2C_FLAG_OVR I2C_ISR_OVR
307 #define I2C_FLAG_PECERR I2C_ISR_PECERR
308 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
309 #define I2C_FLAG_ALERT I2C_ISR_ALERT
310 #define I2C_FLAG_BUSY I2C_ISR_BUSY
312 #define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFF4000) == 0x00) && ((FLAG) != 0x00))
314 #define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_TXIS) || \
315 ((FLAG) == I2C_FLAG_RXNE) || ((FLAG) == I2C_FLAG_ADDR) || \
316 ((FLAG) == I2C_FLAG_NACKF) || ((FLAG) == I2C_FLAG_STOPF) || \
317 ((FLAG) == I2C_FLAG_TC) || ((FLAG) == I2C_FLAG_TCR) || \
318 ((FLAG) == I2C_FLAG_BERR) || ((FLAG) == I2C_FLAG_ARLO) || \
319 ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_PECERR) || \
320 ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_ALERT) || \
321 ((FLAG) == I2C_FLAG_BUSY))
332 #define I2C_IT_TXIS I2C_ISR_TXIS
333 #define I2C_IT_RXNE I2C_ISR_RXNE
334 #define I2C_IT_ADDR I2C_ISR_ADDR
335 #define I2C_IT_NACKF I2C_ISR_NACKF
336 #define I2C_IT_STOPF I2C_ISR_STOPF
337 #define I2C_IT_TC I2C_ISR_TC
338 #define I2C_IT_TCR I2C_ISR_TCR
339 #define I2C_IT_BERR I2C_ISR_BERR
340 #define I2C_IT_ARLO I2C_ISR_ARLO
341 #define I2C_IT_OVR I2C_ISR_OVR
342 #define I2C_IT_PECERR I2C_ISR_PECERR
343 #define I2C_IT_TIMEOUT I2C_ISR_TIMEOUT
344 #define I2C_IT_ALERT I2C_ISR_ALERT
346 #define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFFFFC001) == 0x00) && ((IT) != 0x00))
348 #define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_TXIS) || ((IT) == I2C_IT_RXNE) || \
349 ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_NACKF) || \
350 ((IT) == I2C_IT_STOPF) || ((IT) == I2C_IT_TC) || \
351 ((IT) == I2C_IT_TCR) || ((IT) == I2C_IT_BERR) || \
352 ((IT) == I2C_IT_ARLO) || ((IT) == I2C_IT_OVR) || \
353 ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_TIMEOUT) || \
354 ((IT) == I2C_IT_ALERT))
365 #define I2C_Reload_Mode I2C_CR2_RELOAD
366 #define I2C_AutoEnd_Mode I2C_CR2_AUTOEND
367 #define I2C_SoftEnd_Mode ((uint32_t)0x00000000)
370 #define IS_RELOAD_END_MODE(MODE) (((MODE) == I2C_Reload_Mode) || \
371 ((MODE) == I2C_AutoEnd_Mode) || \
372 ((MODE) == I2C_SoftEnd_Mode))
383 #define I2C_No_StartStop ((uint32_t)0x00000000)
384 #define I2C_Generate_Stop I2C_CR2_STOP
385 #define I2C_Generate_Start_Read (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
386 #define I2C_Generate_Start_Write I2C_CR2_START
389 #define IS_START_STOP_MODE(MODE) (((MODE) == I2C_Generate_Stop) || \
390 ((MODE) == I2C_Generate_Start_Read) || \
391 ((MODE) == I2C_Generate_Start_Write) || \
392 ((MODE) == I2C_No_StartStop))
411 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
413 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint32_t I2C_IT, FunctionalState NewState);
425 void I2C_ReloadCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
434 void I2C_TransferHandling(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Number_Bytes, uint32_t ReloadEndMode, uint32_t StartStopMode);
455 void I2C_DMACmd(I2C_TypeDef* I2Cx, uint32_t I2C_DMAReq, FunctionalState NewState);