30 #ifndef __STM32F0XX_ADC_H
31 #define __STM32F0XX_ADC_H
38 #include "stm32f0xx.h"
56 uint32_t ADC_Resolution;
59 FunctionalState ADC_ContinuousConvMode;
63 uint32_t ADC_ExternalTrigConvEdge;
67 uint32_t ADC_ExternalTrigConv;
71 uint32_t ADC_DataAlign;
74 uint32_t ADC_ScanDirection;
85 #define IS_ADC_ALL_PERIPH(PERIPH) ((PERIPH) == ADC1)
90 #define ADC_JitterOff_PCLKDiv2 ADC_CFGR2_JITOFFDIV2
91 #define ADC_JitterOff_PCLKDiv4 ADC_CFGR2_JITOFFDIV4
93 #define IS_ADC_JITTEROFF(JITTEROFF) (((JITTEROFF) & 0x3FFFFFFF) == (uint32_t)RESET)
102 #define ADC_Resolution_12b ((uint32_t)0x00000000)
103 #define ADC_Resolution_10b ADC_CFGR1_RES_0
104 #define ADC_Resolution_8b ADC_CFGR1_RES_1
105 #define ADC_Resolution_6b ADC_CFGR1_RES
107 #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_Resolution_12b) || \
108 ((RESOLUTION) == ADC_Resolution_10b) || \
109 ((RESOLUTION) == ADC_Resolution_8b) || \
110 ((RESOLUTION) == ADC_Resolution_6b))
119 #define ADC_ExternalTrigConvEdge_None ((uint32_t)0x00000000)
120 #define ADC_ExternalTrigConvEdge_Rising ADC_CFGR1_EXTEN_0
121 #define ADC_ExternalTrigConvEdge_Falling ADC_CFGR1_EXTEN_1
122 #define ADC_ExternalTrigConvEdge_RisingFalling ADC_CFGR1_EXTEN
124 #define IS_ADC_EXT_TRIG_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigConvEdge_None) || \
125 ((EDGE) == ADC_ExternalTrigConvEdge_Rising) || \
126 ((EDGE) == ADC_ExternalTrigConvEdge_Falling) || \
127 ((EDGE) == ADC_ExternalTrigConvEdge_RisingFalling))
137 #define ADC_ExternalTrigConv_T1_TRGO ((uint32_t)0x00000000)
138 #define ADC_ExternalTrigConv_T1_CC4 ADC_CFGR1_EXTSEL_0
141 #define ADC_ExternalTrigConv_T2_TRGO ADC_CFGR1_EXTSEL_1
144 #define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)(ADC_CFGR1_EXTSEL_0 | ADC_CFGR1_EXTSEL_1))
147 #define ADC_ExternalTrigConv_T15_TRGO ADC_CFGR1_EXTSEL_2
149 #define IS_ADC_EXTERNAL_TRIG_CONV(CONV) (((CONV) == ADC_ExternalTrigConv_T1_TRGO) || \
150 ((CONV) == ADC_ExternalTrigConv_T1_CC4) || \
151 ((CONV) == ADC_ExternalTrigConv_T2_TRGO) || \
152 ((CONV) == ADC_ExternalTrigConv_T3_TRGO) || \
153 ((CONV) == ADC_ExternalTrigConv_T15_TRGO))
162 #define ADC_DataAlign_Right ((uint32_t)0x00000000)
163 #define ADC_DataAlign_Left ADC_CFGR1_ALIGN
165 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
166 ((ALIGN) == ADC_DataAlign_Left))
175 #define ADC_ScanDirection_Upward ((uint32_t)0x00000000)
176 #define ADC_ScanDirection_Backward ADC_CFGR1_SCANDIR
178 #define IS_ADC_SCAN_DIRECTION(DIRECTION) (((DIRECTION) == ADC_ScanDirection_Upward) || \
179 ((DIRECTION) == ADC_ScanDirection_Backward))
188 #define ADC_DMAMode_OneShot ((uint32_t)0x00000000)
189 #define ADC_DMAMode_Circular ADC_CFGR1_DMACFG
191 #define IS_ADC_DMA_MODE(MODE) (((MODE) == ADC_DMAMode_OneShot) || \
192 ((MODE) == ADC_DMAMode_Circular))
201 #define ADC_AnalogWatchdog_Channel_0 ((uint32_t)0x00000000)
202 #define ADC_AnalogWatchdog_Channel_1 ((uint32_t)0x04000000)
203 #define ADC_AnalogWatchdog_Channel_2 ((uint32_t)0x08000000)
204 #define ADC_AnalogWatchdog_Channel_3 ((uint32_t)0x0C000000)
205 #define ADC_AnalogWatchdog_Channel_4 ((uint32_t)0x10000000)
206 #define ADC_AnalogWatchdog_Channel_5 ((uint32_t)0x14000000)
207 #define ADC_AnalogWatchdog_Channel_6 ((uint32_t)0x18000000)
208 #define ADC_AnalogWatchdog_Channel_7 ((uint32_t)0x1C000000)
209 #define ADC_AnalogWatchdog_Channel_8 ((uint32_t)0x20000000)
210 #define ADC_AnalogWatchdog_Channel_9 ((uint32_t)0x24000000)
211 #define ADC_AnalogWatchdog_Channel_10 ((uint32_t)0x28000000)
212 #define ADC_AnalogWatchdog_Channel_11 ((uint32_t)0x2C000000)
213 #define ADC_AnalogWatchdog_Channel_12 ((uint32_t)0x30000000)
214 #define ADC_AnalogWatchdog_Channel_13 ((uint32_t)0x34000000)
215 #define ADC_AnalogWatchdog_Channel_14 ((uint32_t)0x38000000)
216 #define ADC_AnalogWatchdog_Channel_15 ((uint32_t)0x3C000000)
217 #define ADC_AnalogWatchdog_Channel_16 ((uint32_t)0x40000000)
218 #define ADC_AnalogWatchdog_Channel_17 ((uint32_t)0x44000000)
219 #define ADC_AnalogWatchdog_Channel_18 ((uint32_t)0x48000000)
222 #define IS_ADC_ANALOG_WATCHDOG_CHANNEL(CHANNEL) (((CHANNEL) == ADC_AnalogWatchdog_Channel_0) || \
223 ((CHANNEL) == ADC_AnalogWatchdog_Channel_1) || \
224 ((CHANNEL) == ADC_AnalogWatchdog_Channel_2) || \
225 ((CHANNEL) == ADC_AnalogWatchdog_Channel_3) || \
226 ((CHANNEL) == ADC_AnalogWatchdog_Channel_4) || \
227 ((CHANNEL) == ADC_AnalogWatchdog_Channel_5) || \
228 ((CHANNEL) == ADC_AnalogWatchdog_Channel_6) || \
229 ((CHANNEL) == ADC_AnalogWatchdog_Channel_7) || \
230 ((CHANNEL) == ADC_AnalogWatchdog_Channel_8) || \
231 ((CHANNEL) == ADC_AnalogWatchdog_Channel_9) || \
232 ((CHANNEL) == ADC_AnalogWatchdog_Channel_10) || \
233 ((CHANNEL) == ADC_AnalogWatchdog_Channel_11) || \
234 ((CHANNEL) == ADC_AnalogWatchdog_Channel_12) || \
235 ((CHANNEL) == ADC_AnalogWatchdog_Channel_13) || \
236 ((CHANNEL) == ADC_AnalogWatchdog_Channel_14) || \
237 ((CHANNEL) == ADC_AnalogWatchdog_Channel_15) || \
238 ((CHANNEL) == ADC_AnalogWatchdog_Channel_16) || \
239 ((CHANNEL) == ADC_AnalogWatchdog_Channel_17) || \
240 ((CHANNEL) == ADC_AnalogWatchdog_Channel_18))
249 #define ADC_SampleTime_1_5Cycles ((uint32_t)0x00000000)
250 #define ADC_SampleTime_7_5Cycles ((uint32_t)0x00000001)
251 #define ADC_SampleTime_13_5Cycles ((uint32_t)0x00000002)
252 #define ADC_SampleTime_28_5Cycles ((uint32_t)0x00000003)
253 #define ADC_SampleTime_41_5Cycles ((uint32_t)0x00000004)
254 #define ADC_SampleTime_55_5Cycles ((uint32_t)0x00000005)
255 #define ADC_SampleTime_71_5Cycles ((uint32_t)0x00000006)
256 #define ADC_SampleTime_239_5Cycles ((uint32_t)0x00000007)
258 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1_5Cycles) || \
259 ((TIME) == ADC_SampleTime_7_5Cycles) || \
260 ((TIME) == ADC_SampleTime_13_5Cycles) || \
261 ((TIME) == ADC_SampleTime_28_5Cycles) || \
262 ((TIME) == ADC_SampleTime_41_5Cycles) || \
263 ((TIME) == ADC_SampleTime_55_5Cycles) || \
264 ((TIME) == ADC_SampleTime_71_5Cycles) || \
265 ((TIME) == ADC_SampleTime_239_5Cycles))
274 #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)
284 #define ADC_Channel_0 ADC_CHSELR_CHSEL0
285 #define ADC_Channel_1 ADC_CHSELR_CHSEL1
286 #define ADC_Channel_2 ADC_CHSELR_CHSEL2
287 #define ADC_Channel_3 ADC_CHSELR_CHSEL3
288 #define ADC_Channel_4 ADC_CHSELR_CHSEL4
289 #define ADC_Channel_5 ADC_CHSELR_CHSEL5
290 #define ADC_Channel_6 ADC_CHSELR_CHSEL6
291 #define ADC_Channel_7 ADC_CHSELR_CHSEL7
292 #define ADC_Channel_8 ADC_CHSELR_CHSEL8
293 #define ADC_Channel_9 ADC_CHSELR_CHSEL9
294 #define ADC_Channel_10 ADC_CHSELR_CHSEL10
295 #define ADC_Channel_11 ADC_CHSELR_CHSEL11
296 #define ADC_Channel_12 ADC_CHSELR_CHSEL12
297 #define ADC_Channel_13 ADC_CHSELR_CHSEL13
298 #define ADC_Channel_14 ADC_CHSELR_CHSEL14
299 #define ADC_Channel_15 ADC_CHSELR_CHSEL15
300 #define ADC_Channel_16 ADC_CHSELR_CHSEL16
301 #define ADC_Channel_17 ADC_CHSELR_CHSEL17
302 #define ADC_Channel_18 ADC_CHSELR_CHSEL18
304 #define ADC_Channel_TempSensor ((uint32_t)ADC_Channel_16)
305 #define ADC_Channel_Vrefint ((uint32_t)ADC_Channel_17)
306 #define ADC_Channel_Vbat ((uint32_t)ADC_Channel_18)
308 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) != (uint32_t)RESET) && (((CHANNEL) & 0xFFF80000) == (uint32_t)RESET))
318 #define ADC_IT_ADRDY ADC_IER_ADRDYIE
319 #define ADC_IT_EOSMP ADC_IER_EOSMPIE
320 #define ADC_IT_EOC ADC_IER_EOCIE
321 #define ADC_IT_EOSEQ ADC_IER_EOSEQIE
322 #define ADC_IT_OVR ADC_IER_OVRIE
323 #define ADC_IT_AWD ADC_IER_AWDIE
325 #define IS_ADC_CONFIG_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFFFFF60) == (uint32_t)RESET))
327 #define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_ADRDY) || ((IT) == ADC_IT_EOSMP) || \
328 ((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_EOSEQ) || \
329 ((IT) == ADC_IT_OVR) || ((IT) == ADC_IT_AWD))
331 #define IS_ADC_CLEAR_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFFFFF60) == (uint32_t)RESET))
341 #define ADC_FLAG_ADRDY ADC_ISR_ADRDY
342 #define ADC_FLAG_EOSMP ADC_ISR_EOSMP
343 #define ADC_FLAG_EOC ADC_ISR_EOC
344 #define ADC_FLAG_EOSEQ ADC_ISR_EOSEQ
345 #define ADC_FLAG_OVR ADC_ISR_OVR
346 #define ADC_FLAG_AWD ADC_ISR_AWD
348 #define ADC_FLAG_ADEN ((uint32_t)0x01000001)
349 #define ADC_FLAG_ADDIS ((uint32_t)0x01000002)
350 #define ADC_FLAG_ADSTART ((uint32_t)0x01000004)
351 #define ADC_FLAG_ADSTP ((uint32_t)0x01000008)
352 #define ADC_FLAG_ADCAL ((uint32_t)0x11000000)
354 #define IS_ADC_CLEAR_FLAG(FLAG) (((FLAG) != (uint32_t)RESET) && (((FLAG) & 0xEFFFFF60) == (uint32_t)RESET))
356 #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_ADRDY) || ((FLAG) == ADC_FLAG_EOSMP) || \
357 ((FLAG) == ADC_FLAG_EOC) || ((FLAG)== ADC_FLAG_EOSEQ) || \
358 ((FLAG) == ADC_FLAG_AWD) || ((FLAG)== ADC_FLAG_OVR) || \
359 ((FLAG) == ADC_FLAG_ADEN) || ((FLAG)== ADC_FLAG_ADDIS) || \
360 ((FLAG) == ADC_FLAG_ADSTART) || ((FLAG)== ADC_FLAG_ADSTP) || \
361 ((FLAG) == ADC_FLAG_ADCAL))
379 void ADC_JitterCmd(ADC_TypeDef* ADCx, uint32_t ADC_JitterOff, FunctionalState NewState);
380 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
398 void ADC_ChannelConfig(ADC_TypeDef* ADCx, uint32_t ADC_Channel, uint32_t ADC_SampleTime);
408 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
412 void ADC_ITConfig(ADC_TypeDef* ADCx, uint32_t ADC_IT, FunctionalState NewState);