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#define | RCC_AHB1Periph_GPIOA ((uint32_t)0x00000001) |
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#define | RCC_AHB1Periph_GPIOB ((uint32_t)0x00000002) |
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#define | RCC_AHB1Periph_GPIOC ((uint32_t)0x00000004) |
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#define | RCC_AHB1Periph_GPIOD ((uint32_t)0x00000008) |
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#define | RCC_AHB1Periph_GPIOE ((uint32_t)0x00000010) |
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#define | RCC_AHB1Periph_GPIOF ((uint32_t)0x00000020) |
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#define | RCC_AHB1Periph_GPIOG ((uint32_t)0x00000040) |
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#define | RCC_AHB1Periph_GPIOH ((uint32_t)0x00000080) |
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#define | RCC_AHB1Periph_GPIOI ((uint32_t)0x00000100) |
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#define | RCC_AHB1Periph_CRC ((uint32_t)0x00001000) |
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#define | RCC_AHB1Periph_FLITF ((uint32_t)0x00008000) |
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#define | RCC_AHB1Periph_SRAM1 ((uint32_t)0x00010000) |
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#define | RCC_AHB1Periph_SRAM2 ((uint32_t)0x00020000) |
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#define | RCC_AHB1Periph_BKPSRAM ((uint32_t)0x00040000) |
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#define | RCC_AHB1Periph_CCMDATARAMEN ((uint32_t)0x00100000) |
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#define | RCC_AHB1Periph_DMA1 ((uint32_t)0x00200000) |
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#define | RCC_AHB1Periph_DMA2 ((uint32_t)0x00400000) |
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#define | RCC_AHB1Periph_ETH_MAC ((uint32_t)0x02000000) |
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#define | RCC_AHB1Periph_ETH_MAC_Tx ((uint32_t)0x04000000) |
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#define | RCC_AHB1Periph_ETH_MAC_Rx ((uint32_t)0x08000000) |
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#define | RCC_AHB1Periph_ETH_MAC_PTP ((uint32_t)0x10000000) |
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#define | RCC_AHB1Periph_OTG_HS ((uint32_t)0x20000000) |
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#define | RCC_AHB1Periph_OTG_HS_ULPI ((uint32_t)0x40000000) |
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#define | IS_RCC_AHB1_CLOCK_PERIPH(PERIPH) ((((PERIPH) & 0x818BEE00) == 0x00) && ((PERIPH) != 0x00)) |
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#define | IS_RCC_AHB1_RESET_PERIPH(PERIPH) ((((PERIPH) & 0xDD9FEE00) == 0x00) && ((PERIPH) != 0x00)) |
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#define | IS_RCC_AHB1_LPMODE_PERIPH(PERIPH) ((((PERIPH) & 0x81986E00) == 0x00) && ((PERIPH) != 0x00)) |
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