30 #ifndef __STM32F37X_I2C_H
31 #define __STM32F37X_I2C_H
38 #include "stm32f37x.h"
59 uint32_t I2C_AnalogFilter;
62 uint32_t I2C_DigitalFilter;
68 uint32_t I2C_OwnAddress1;
74 uint32_t I2C_AcknowledgedAddress;
85 #define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \
92 #define I2C_AnalogFilter_Enable ((uint32_t)0x00000000)
93 #define I2C_AnalogFilter_Disable I2C_CR1_ANFOFF
95 #define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_AnalogFilter_Enable) || \
96 ((FILTER) == I2C_AnalogFilter_Disable))
105 #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000F)
114 #define I2C_Mode_I2C ((uint32_t)0x00000000)
115 #define I2C_Mode_SMBusDevice I2C_CR1_SMBDEN
116 #define I2C_Mode_SMBusHost I2C_CR1_SMBHEN
118 #define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \
119 ((MODE) == I2C_Mode_SMBusDevice) || \
120 ((MODE) == I2C_Mode_SMBusHost))
129 #define I2C_Ack_Enable ((uint32_t)0x00000000)
130 #define I2C_Ack_Disable I2C_CR2_NACK
132 #define IS_I2C_ACK(ACK) (((ACK) == I2C_Ack_Enable) || \
133 ((ACK) == I2C_Ack_Disable))
142 #define I2C_AcknowledgedAddress_7bit ((uint32_t)0x00000000)
143 #define I2C_AcknowledgedAddress_10bit I2C_OAR1_OA1MODE
145 #define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
146 ((ADDRESS) == I2C_AcknowledgedAddress_10bit))
155 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF)
164 #define I2C_Direction_Transmitter ((uint16_t)0x0000)
165 #define I2C_Direction_Receiver ((uint16_t)0x0400)
167 #define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \
168 ((DIRECTION) == I2C_Direction_Receiver))
177 #define I2C_DMAReq_Tx I2C_CR1_TXDMAEN
178 #define I2C_DMAReq_Rx I2C_CR1_RXDMAEN
180 #define IS_I2C_DMA_REQ(REQ) ((((REQ) & (uint32_t)0xFFFF3FFF) == 0x00) && ((REQ) != 0x00))
189 #define IS_I2C_SLAVE_ADDRESS(ADDRESS) ((ADDRESS) <= (uint16_t)0x03FF)
199 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF)
209 #define I2C_OA2_NoMask ((uint8_t)0x00)
210 #define I2C_OA2_Mask01 ((uint8_t)0x01)
211 #define I2C_OA2_Mask02 ((uint8_t)0x02)
212 #define I2C_OA2_Mask03 ((uint8_t)0x03)
213 #define I2C_OA2_Mask04 ((uint8_t)0x04)
214 #define I2C_OA2_Mask05 ((uint8_t)0x05)
215 #define I2C_OA2_Mask06 ((uint8_t)0x06)
216 #define I2C_OA2_Mask07 ((uint8_t)0x07)
218 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NoMask) || \
219 ((MASK) == I2C_OA2_Mask01) || \
220 ((MASK) == I2C_OA2_Mask02) || \
221 ((MASK) == I2C_OA2_Mask03) || \
222 ((MASK) == I2C_OA2_Mask04) || \
223 ((MASK) == I2C_OA2_Mask05) || \
224 ((MASK) == I2C_OA2_Mask06) || \
225 ((MASK) == I2C_OA2_Mask07))
235 #define IS_I2C_TIMEOUT(TIMEOUT) ((TIMEOUT) <= (uint16_t)0x0FFF)
245 #define I2C_Register_CR1 ((uint8_t)0x00)
246 #define I2C_Register_CR2 ((uint8_t)0x04)
247 #define I2C_Register_OAR1 ((uint8_t)0x08)
248 #define I2C_Register_OAR2 ((uint8_t)0x0C)
249 #define I2C_Register_TIMINGR ((uint8_t)0x10)
250 #define I2C_Register_TIMEOUTR ((uint8_t)0x14)
251 #define I2C_Register_ISR ((uint8_t)0x18)
252 #define I2C_Register_ICR ((uint8_t)0x1C)
253 #define I2C_Register_PECR ((uint8_t)0x20)
254 #define I2C_Register_RXDR ((uint8_t)0x24)
255 #define I2C_Register_TXDR ((uint8_t)0x28)
257 #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \
258 ((REGISTER) == I2C_Register_CR2) || \
259 ((REGISTER) == I2C_Register_OAR1) || \
260 ((REGISTER) == I2C_Register_OAR2) || \
261 ((REGISTER) == I2C_Register_TIMINGR) || \
262 ((REGISTER) == I2C_Register_TIMEOUTR) || \
263 ((REGISTER) == I2C_Register_ISR) || \
264 ((REGISTER) == I2C_Register_ICR) || \
265 ((REGISTER) == I2C_Register_PECR) || \
266 ((REGISTER) == I2C_Register_RXDR) || \
267 ((REGISTER) == I2C_Register_TXDR))
276 #define I2C_IT_ERRI I2C_CR1_ERRIE
277 #define I2C_IT_TCI I2C_CR1_TCIE
278 #define I2C_IT_STOPI I2C_CR1_STOPIE
279 #define I2C_IT_NACKI I2C_CR1_NACKIE
280 #define I2C_IT_ADDRI I2C_CR1_ADDRIE
281 #define I2C_IT_RXI I2C_CR1_RXIE
282 #define I2C_IT_TXI I2C_CR1_TXIE
284 #define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint32_t)0xFFFFFF01) == 0x00) && ((IT) != 0x00))
294 #define I2C_FLAG_TXE I2C_ISR_TXE
295 #define I2C_FLAG_TXIS I2C_ISR_TXIS
296 #define I2C_FLAG_RXNE I2C_ISR_RXNE
297 #define I2C_FLAG_ADDR I2C_ISR_ADDR
298 #define I2C_FLAG_NACKF I2C_ISR_NACKF
299 #define I2C_FLAG_STOPF I2C_ISR_STOPF
300 #define I2C_FLAG_TC I2C_ISR_TC
301 #define I2C_FLAG_TCR I2C_ISR_TCR
302 #define I2C_FLAG_BERR I2C_ISR_BERR
303 #define I2C_FLAG_ARLO I2C_ISR_ARLO
304 #define I2C_FLAG_OVR I2C_ISR_OVR
305 #define I2C_FLAG_PECERR I2C_ISR_PECERR
306 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
307 #define I2C_FLAG_ALERT I2C_ISR_ALERT
308 #define I2C_FLAG_BUSY I2C_ISR_BUSY
310 #define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFF4000) == 0x00) && ((FLAG) != 0x00))
312 #define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_TXIS) || \
313 ((FLAG) == I2C_FLAG_RXNE) || ((FLAG) == I2C_FLAG_ADDR) || \
314 ((FLAG) == I2C_FLAG_NACKF) || ((FLAG) == I2C_FLAG_STOPF) || \
315 ((FLAG) == I2C_FLAG_TC) || ((FLAG) == I2C_FLAG_TCR) || \
316 ((FLAG) == I2C_FLAG_BERR) || ((FLAG) == I2C_FLAG_ARLO) || \
317 ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_PECERR) || \
318 ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_ALERT) || \
319 ((FLAG) == I2C_FLAG_BUSY))
330 #define I2C_IT_TXIS I2C_ISR_TXIS
331 #define I2C_IT_RXNE I2C_ISR_RXNE
332 #define I2C_IT_ADDR I2C_ISR_ADDR
333 #define I2C_IT_NACKF I2C_ISR_NACKF
334 #define I2C_IT_STOPF I2C_ISR_STOPF
335 #define I2C_IT_TC I2C_ISR_TC
336 #define I2C_IT_TCR I2C_ISR_TCR
337 #define I2C_IT_BERR I2C_ISR_BERR
338 #define I2C_IT_ARLO I2C_ISR_ARLO
339 #define I2C_IT_OVR I2C_ISR_OVR
340 #define I2C_IT_PECERR I2C_ISR_PECERR
341 #define I2C_IT_TIMEOUT I2C_ISR_TIMEOUT
342 #define I2C_IT_ALERT I2C_ISR_ALERT
344 #define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFFFFC001) == 0x00) && ((IT) != 0x00))
346 #define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_TXIS) || ((IT) == I2C_IT_RXNE) || \
347 ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_NACKF) || \
348 ((IT) == I2C_IT_STOPF) || ((IT) == I2C_IT_TC) || \
349 ((IT) == I2C_IT_TCR) || ((IT) == I2C_IT_BERR) || \
350 ((IT) == I2C_IT_ARLO) || ((IT) == I2C_IT_OVR) || \
351 ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_TIMEOUT) || \
352 ((IT) == I2C_IT_ALERT))
363 #define I2C_Reload_Mode I2C_CR2_RELOAD
364 #define I2C_AutoEnd_Mode I2C_CR2_AUTOEND
365 #define I2C_SoftEnd_Mode ((uint32_t)0x00000000)
368 #define IS_RELOAD_END_MODE(MODE) (((MODE) == I2C_Reload_Mode) || \
369 ((MODE) == I2C_AutoEnd_Mode) || \
370 ((MODE) == I2C_SoftEnd_Mode))
381 #define I2C_No_StartStop ((uint32_t)0x00000000)
382 #define I2C_Generate_Stop I2C_CR2_STOP
383 #define I2C_Generate_Start_Read (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
384 #define I2C_Generate_Start_Write I2C_CR2_START
387 #define IS_START_STOP_MODE(MODE) (((MODE) == I2C_Generate_Stop) || \
388 ((MODE) == I2C_Generate_Start_Read) || \
389 ((MODE) == I2C_Generate_Start_Write) || \
390 ((MODE) == I2C_No_StartStop))
409 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
411 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint32_t I2C_IT, FunctionalState NewState);
423 void I2C_ReloadCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
432 void I2C_TransferHandling(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Number_Bytes, uint32_t ReloadEndMode, uint32_t StartStopMode);
453 void I2C_DMACmd(I2C_TypeDef* I2Cx, uint32_t I2C_DMAReq, FunctionalState NewState);