29 #ifndef __STM32F37X_DBGMCU_H
30 #define __STM32F37X_DBGMCU_H
37 #include "stm32f37x.h"
53 #define DBGMCU_SLEEP DBGMCU_CR_DBG_SLEEP
54 #define DBGMCU_STOP DBGMCU_CR_DBG_STOP
55 #define DBGMCU_STANDBY DBGMCU_CR_DBG_STANDBY
56 #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFF8) == 0x00) && ((PERIPH) != 0x00))
58 #define DBGMCU_TIM2_STOP DBGMCU_APB1_FZ_DBG_TIM2_STOP
59 #define DBGMCU_TIM3_STOP DBGMCU_APB1_FZ_DBG_TIM3_STOP
60 #define DBGMCU_TIM4_STOP DBGMCU_APB1_FZ_DBG_TIM4_STOP
61 #define DBGMCU_TIM5_STOP DBGMCU_APB1_FZ_DBG_TIM5_STOP
62 #define DBGMCU_TIM6_STOP DBGMCU_APB1_FZ_DBG_TIM6_STOP
63 #define DBGMCU_TIM7_STOP DBGMCU_APB1_FZ_DBG_TIM7_STOP
64 #define DBGMCU_TIM12_STOP DBGMCU_APB1_FZ_DBG_TIM12_STOP
65 #define DBGMCU_TIM13_STOP DBGMCU_APB1_FZ_DBG_TIM13_STOP
66 #define DBGMCU_TIM14_STOP DBGMCU_APB1_FZ_DBG_TIM14_STOP
67 #define DBGMCU_TIM18_STOP DBGMCU_APB1_FZ_DBG_TIM18_STOP
68 #define DBGMCU_RTC_STOP DBGMCU_APB1_FZ_DBG_RTC_STOP
69 #define DBGMCU_WWDG_STOP DBGMCU_APB1_FZ_DBG_WWDG_STOP
70 #define DBGMCU_IWDG_STOP DBGMCU_APB1_FZ_DBG_IWDG_STOP
71 #define DBGMCU_I2C1_SMBUS_TIMEOUT DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT
72 #define DBGMCU_I2C2_SMBUS_TIMEOUT DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT
73 #define DBGMCU_CAN1_STOP DBGMCU_APB1_FZ_DBG_CAN1_STOP
75 #define IS_DBGMCU_APB1PERIPH(PERIPH) ((((PERIPH) & 0xFD9FE000) == 0x00) && ((PERIPH) != 0x00))
77 #define DBGMCU_TIM15_STOP DBGMCU_APB2_FZ_DBG_TIM15_STOP
78 #define DBGMCU_TIM16_STOP DBGMCU_APB2_FZ_DBG_TIM16_STOP
79 #define DBGMCU_TIM17_STOP DBGMCU_APB2_FZ_DBG_TIM17_STOP
80 #define DBGMCU_TIM19_STOP DBGMCU_APB2_FZ_DBG_TIM19_STOP
81 #define IS_DBGMCU_APB2PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFC3) == 0x00) && ((PERIPH) != 0x00))
95 void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);