STM32F37 Standard Peripheral bibliotheek  1.0
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stm32f37x_adc.h
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1 
29 /* Define to prevent recursive inclusion -------------------------------------*/
30 #ifndef __STM32F37X_ADC_H
31 #define __STM32F37X_ADC_H
32 
33 #ifdef __cplusplus
34  extern "C" {
35 #endif
36 
37 /* Includes ------------------------------------------------------------------*/
38 #include "stm32f37x.h"
39 
48 /* Exported types ------------------------------------------------------------*/
49 
54 typedef struct
55 {
56 
57  FunctionalState ADC_ScanConvMode;
61  FunctionalState ADC_ContinuousConvMode;
65  uint32_t ADC_ExternalTrigConv;
69  uint32_t ADC_DataAlign;
72  uint8_t ADC_NbrOfChannel;
75 }ADC_InitTypeDef;
76 
81 /* Exported constants --------------------------------------------------------*/
82 
87 #define IS_ADC_ALL_PERIPH(PERIPH) ((PERIPH) == ADC1)
88 
89 #define IS_ADC_DMA_PERIPH(PERIPH) ((PERIPH) == ADC1)
90 
95 #define ADC_ExternalTrigConv_T19_TRGO ((uint32_t)0x00000000)
96 #define ADC_ExternalTrigConv_T19_CC3 ADC_CR2_EXTSEL_0
97 #define ADC_ExternalTrigConv_T19_CC4 ADC_CR2_EXTSEL_1
98 #define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000)
99 #define ADC_ExternalTrigConv_T3_TRGO ADC_CR2_EXTSEL_2
100 #define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000)
101 #define ADC_ExternalTrigConv_Ext_IT11 ((uint32_t)0x000C0000)
102 #define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000)
103 
104 #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T19_TRGO) || \
105  ((REGTRIG) == ADC_ExternalTrigConv_T19_CC3) || \
106  ((REGTRIG) == ADC_ExternalTrigConv_T19_CC4) || \
107  ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \
108  ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \
109  ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \
110  ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11) || \
111  ((REGTRIG) == ADC_ExternalTrigConv_None))
112 
121 #define ADC_DataAlign_Right ((uint32_t)0x00000000)
122 #define ADC_DataAlign_Left ADC_CR2_ALIGN
123 
124 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
125  ((ALIGN) == ADC_DataAlign_Left))
126 
134 #define ADC_Channel_0 ((uint8_t)0x00)
135 #define ADC_Channel_1 ((uint8_t)0x01)
136 #define ADC_Channel_2 ((uint8_t)0x02)
137 #define ADC_Channel_3 ((uint8_t)0x03)
138 #define ADC_Channel_4 ((uint8_t)0x04)
139 #define ADC_Channel_5 ((uint8_t)0x05)
140 #define ADC_Channel_6 ((uint8_t)0x06)
141 #define ADC_Channel_7 ((uint8_t)0x07)
142 #define ADC_Channel_8 ((uint8_t)0x08)
143 #define ADC_Channel_9 ((uint8_t)0x09)
144 #define ADC_Channel_10 ((uint8_t)0x0A)
145 #define ADC_Channel_11 ((uint8_t)0x0B)
146 #define ADC_Channel_12 ((uint8_t)0x0C)
147 #define ADC_Channel_13 ((uint8_t)0x0D)
148 #define ADC_Channel_14 ((uint8_t)0x0E)
149 #define ADC_Channel_15 ((uint8_t)0x0F)
150 #define ADC_Channel_16 ((uint8_t)0x10)
151 #define ADC_Channel_17 ((uint8_t)0x11)
152 #define ADC_Channel_18 ((uint8_t)0x12)
153 
154 #define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16)
155 #define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17)
156 #define ADC_Channel_Vbat ((uint8_t)ADC_Channel_18)
157 
158 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || \
159  ((CHANNEL) == ADC_Channel_1) || \
160  ((CHANNEL) == ADC_Channel_2) || \
161  ((CHANNEL) == ADC_Channel_3) || \
162  ((CHANNEL) == ADC_Channel_4) || \
163  ((CHANNEL) == ADC_Channel_5) || \
164  ((CHANNEL) == ADC_Channel_6) || \
165  ((CHANNEL) == ADC_Channel_7) || \
166  ((CHANNEL) == ADC_Channel_8) || \
167  ((CHANNEL) == ADC_Channel_9) || \
168  ((CHANNEL) == ADC_Channel_10) || \
169  ((CHANNEL) == ADC_Channel_11) || \
170  ((CHANNEL) == ADC_Channel_12) || \
171  ((CHANNEL) == ADC_Channel_13) || \
172  ((CHANNEL) == ADC_Channel_14) || \
173  ((CHANNEL) == ADC_Channel_15) || \
174  ((CHANNEL) == ADC_Channel_16) || \
175  ((CHANNEL) == ADC_Channel_17) || \
176  ((CHANNEL) == ADC_Channel_18))
177 
185 #define ADC_SampleTime_1Cycles5 ((uint8_t)0x00)
186 #define ADC_SampleTime_7Cycles5 ADC_SMPR2_SMP0_0
187 #define ADC_SampleTime_13Cycles5 ADC_SMPR2_SMP0_1
188 #define ADC_SampleTime_28Cycles5 ((uint8_t)0x03)
189 #define ADC_SampleTime_41Cycles5 ADC_SMPR2_SMP0_2
190 #define ADC_SampleTime_55Cycles5 ((uint8_t)0x05)
191 #define ADC_SampleTime_71Cycles5 ((uint8_t)0x06)
192 #define ADC_SampleTime_239Cycles5 ((uint8_t)0x07)
193 
194 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \
195  ((TIME) == ADC_SampleTime_7Cycles5) || \
196  ((TIME) == ADC_SampleTime_13Cycles5) || \
197  ((TIME) == ADC_SampleTime_28Cycles5) || \
198  ((TIME) == ADC_SampleTime_41Cycles5) || \
199  ((TIME) == ADC_SampleTime_55Cycles5) || \
200  ((TIME) == ADC_SampleTime_71Cycles5) || \
201  ((TIME) == ADC_SampleTime_239Cycles5))
202 
210 #define ADC_ExternalTrigInjecConv_T19_CC1 ((uint32_t)0x00000000)
211 #define ADC_ExternalTrigInjecConv_T19_CC2 ADC_CR2_JEXTSEL_0
212 #define ADC_ExternalTrigInjecConv_T2_TRGO ADC_CR2_JEXTSEL_1
213 #define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000)
214 #define ADC_ExternalTrigInjecConv_T3_CC4 ADC_CR2_JEXTSEL_2
215 #define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000)
216 #define ADC_ExternalTrigInjecConv_Ext_IT15 ((uint32_t)0x00006000)
217 #define ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000)
218 
219 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T19_CC1) || \
220  ((INJTRIG) == ADC_ExternalTrigInjecConv_T19_CC2) || \
221  ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \
222  ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \
223  ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \
224  ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \
225  ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15)|| \
226  ((INJTRIG) == ADC_ExternalTrigInjecConv_None))
227 
236 #define ADC_InjectedChannel_1 ((uint8_t)0x14)
237 #define ADC_InjectedChannel_2 ((uint8_t)0x18)
238 #define ADC_InjectedChannel_3 ((uint8_t)0x1C)
239 #define ADC_InjectedChannel_4 ((uint8_t)0x20)
240 #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \
241  ((CHANNEL) == ADC_InjectedChannel_2) || \
242  ((CHANNEL) == ADC_InjectedChannel_3) || \
243  ((CHANNEL) == ADC_InjectedChannel_4))
244 
252 #define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200)
253 #define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200)
254 #define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200)
255 #define ADC_AnalogWatchdog_AllRegEnable ADC_CR1_AWDEN
256 #define ADC_AnalogWatchdog_AllInjecEnable ADC_CR1_JAWDEN
257 #define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000)
258 #define ADC_AnalogWatchdog_None ((uint32_t)0x00000000)
259 
260 #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
261  ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \
262  ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \
263  ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \
264  ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \
265  ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \
266  ((WATCHDOG) == ADC_AnalogWatchdog_None))
267 
275 #define ADC_IT_EOC ((uint16_t)0x0220)
276 #define ADC_IT_AWD ((uint16_t)0x0140)
277 #define ADC_IT_JEOC ((uint16_t)0x0480)
278 
279 #define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF81F) == 0x00) && ((IT) != 0x00))
280 
281 #define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \
282  ((IT) == ADC_IT_JEOC))
283 
291 #define ADC_FLAG_AWD ADC_SR_AWD
292 #define ADC_FLAG_EOC ADC_SR_EOC
293 #define ADC_FLAG_JEOC ADC_SR_JEOC
294 #define ADC_FLAG_JSTRT ADC_SR_JSTRT
295 #define ADC_FLAG_STRT ADC_SR_STRT
296 
297 #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xE0) == 0x00) && ((FLAG) != 0x00))
298 #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \
299  ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \
300  ((FLAG) == ADC_FLAG_STRT))
301 
309 #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)
310 
319 #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)
320 
329 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4))
330 
339 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4))
340 
350 #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10))
351 
359 #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10))
360 
369 #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8))
370 
380 /* Exported macro ------------------------------------------------------------*/
381 /* Exported functions ------------------------------------------------------- */
382 
383 /* Function used to set the ADC configuration to the default reset state *****/
384 void ADC_DeInit(ADC_TypeDef* ADCx);
385 
386 /* Initialization and Configuration functions *********************************/
387 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
388 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
389 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
390 void ADC_StartCalibration(ADC_TypeDef* ADCx);
391 void ADC_ResetCalibration(ADC_TypeDef* ADCx);
392 
393 /* Analog Watchdog configuration functions ************************************/
394 void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog);
395 void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold);
396 void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
397 
398 /* Temperature Sensor & Vrefint (Voltage Reference internal) management function */
399 void ADC_TempSensorVrefintCmd(FunctionalState NewState);
400 
401 /* Regular Channels Configuration functions ***********************************/
402 void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
403 void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
404 void ADC_SoftwareStartConv(ADC_TypeDef* ADCx);
405 FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx);
406 void ADC_ContinuousModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
407 void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number);
408 void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
409 uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
410 
411 /* Regular Channels DMA Configuration functions *******************************/
412 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
413 
414 /* Injected channels Configuration functions **********************************/
415 void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
416 void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length);
417 void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t ADC_Offset);
418 void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv);
419 void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
420 void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
421 FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx);
422 void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
423 void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
424 uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel);
425 
426 /* Interrupts and flags management functions **********************************/
427 void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState);
428 FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
429 void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
430 ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT);
431 void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT);
432 FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx);
433 FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx);
434 
435 #ifdef __cplusplus
436 }
437 #endif
438 
439 #endif /*__STM32F37X_ADC_H */
440 
449 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/