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FSMC_NAND_PCCARDTimingInitTypeDef Struct Reference

Timing parameters For FSMC NAND and PCCARD Banks. More...

#include <stm32f2xx_fsmc.h>

Data Fields

uint32_t FSMC_SetupTime
 
uint32_t FSMC_WaitSetupTime
 
uint32_t FSMC_HoldSetupTime
 
uint32_t FSMC_HiZSetupTime
 

Detailed Description

Timing parameters For FSMC NAND and PCCARD Banks.

Field Documentation

uint32_t FSMC_HiZSetupTime
   Defines the number of HCLK clock cycles during which the

databus is kept in HiZ after the start of a NAND-Flash write access to common/Attribute or I/O memory space (depending on the memory space timing to be configured). This parameter can be a number between 0x00 and 0xFF

uint32_t FSMC_HoldSetupTime
  Defines the number of HCLK clock cycles to hold address

(and data for write access) after the command deassertion for NAND-Flash read or write access to common/Attribute or I/O memory space (depending on the memory space timing to be configured). This parameter can be a number between 0x00 and 0xFF

uint32_t FSMC_SetupTime
      Defines the number of HCLK cycles to setup address before

the command assertion for NAND-Flash read or write access to common/Attribute or I/O memory space (depending on the memory space timing to be configured). This parameter can be a value between 0 and 0xFF.

uint32_t FSMC_WaitSetupTime
  Defines the minimum number of HCLK cycles to assert the

command for NAND-Flash read or write access to common/Attribute or I/O memory space (depending on the memory space timing to be configured). This parameter can be a number between 0x00 and 0xFF


The documentation for this struct was generated from the following file: